/dts-v1/;

/ {
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	compatible = "rockchip,rk3288-rsb4680-a3", "rockchip,rk3288";
	interrupt-parent = <0x1>;
	model = "RSB-4680 a103-1";

	chosen {
		bootargs = "earlyprintk vmalloc=496M";
	};

	aliases {
		ethernet0 = "/ethernet@ff290000";
		i2c0 = "/i2c@ff650000";
		i2c1 = "/i2c@ff140000";
		i2c2 = "/i2c@ff660000";
		i2c3 = "/i2c@ff150000";
		i2c4 = "/i2c@ff160000";
		i2c5 = "/i2c@ff170000";
		mshc0 = "/dwmmc@ff0f0000";
		mshc1 = "/dwmmc@ff0c0000";
		mshc2 = "/dwmmc@ff0d0000";
		mshc3 = "/dwmmc@ff0e0000";
		serial0 = "/serial@ff180000";
		serial1 = "/serial@ff190000";
		serial2 = "/serial@ff690000";
		serial3 = "/serial@ff1b0000";
		serial4 = "/serial@ff1c0000";
		spi0 = "/spi@ff110000";
		spi1 = "/spi@ff120000";
		spi2 = "/spi@ff130000";
		dsi0 = "/dsi@ff960000";
		dsi1 = "/dsi@ff964000";
		hdmi = "/hdmi@ff980000";
		edp = "/dp@ff970000";
		edp_phy = "/syscon@ff770000/edp-phy";
		lvds = "/lvds@ff96c000";
		lvds_in_vopl = "/lvds@ff96c000/ports/port@0/endpoint@1";
		lvds_in_vopb = "/lvds@ff96c000/ports/port@0/endpoint@0";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x0 0x0 0x0>;
	};

	arm-pmu {
		compatible = "arm,cortex-a12-pmu";
		interrupts = <0x0 0x97 0x4 0x0 0x98 0x4 0x0 0x99 0x4 0x0 0x9a 0x4>;
		interrupt-affinity = <0x2 0x3 0x4 0x5>;
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		enable-method = "rockchip,rk3066-smp";
		rockchip,pmu = <0x6>;

		cpu@500 {
			device_type = "cpu";
			compatible = "arm,cortex-a12";
			reg = <0x500>;
			resets = <0x7 0x0>;
			operating-points-v2 = <0x8>;
			#cooling-cells = <0x2>;
			dynamic-power-coefficient = <0x142>;
			clocks = <0x7 0x6>;
			enable-method = "psci";
			cpu-supply = <0x9>;
			phandle = <0x2>;
		};

		cpu@501 {
			device_type = "cpu";
			compatible = "arm,cortex-a12";
			reg = <0x501>;
			resets = <0x7 0x1>;
			operating-points-v2 = <0x8>;
			enable-method = "psci";
			phandle = <0x3>;
		};

		cpu@502 {
			device_type = "cpu";
			compatible = "arm,cortex-a12";
			reg = <0x502>;
			resets = <0x7 0x2>;
			operating-points-v2 = <0x8>;
			enable-method = "psci";
			phandle = <0x4>;
		};

		cpu@503 {
			device_type = "cpu";
			compatible = "arm,cortex-a12";
			reg = <0x503>;
			resets = <0x7 0x3>;
			operating-points-v2 = <0x8>;
			enable-method = "psci";
			phandle = <0x5>;
		};
	};

	opp_table0 {
		compatible = "operating-points-v2";
		opp-shared;
		clocks = <0x7 0x1>;
		rockchip,avs-scale = <0x11>;
		rockchip,max-volt = <0x149970>;
		nvmem-cells = <0xa 0xb 0xc 0xd 0xe>;
		nvmem-cell-names = "leakage", "special", "performance", "process", "performance-w";
		rockchip,bin-scaling-sel = <0x0 0x11 0x1 0x19 0x2 0x1b 0x3 0x1f>;
		rockchip,pvtm-voltage-sel = <0x0 0x37dc 0x0 0x37dd 0x3a98 0x1 0x3a99 0x3e80 0x2 0x3e81 0x1869f 0x3>;
		rockchip,pvtm-freq = <0x639c0>;
		rockchip,pvtm-volt = <0xf4240>;
		rockchip,pvtm-ch = <0x0 0x0>;
		rockchip,pvtm-sample-time = <0x3e8>;
		rockchip,pvtm-number = <0xa>;
		rockchip,pvtm-error = <0x3e8>;
		rockchip,pvtm-ref-temp = <0x23>;
		rockchip,pvtm-temp-prop = <0xffffffee 0xffffffee>;
		rockchip,pvtm-thermal-zone = "soc-thermal";
		rockchip,avs-enable = <0x1>;
		phandle = <0x8>;

		opp-408000000 {
			opp-hz = <0x0 0x18519600>;
			opp-microvolt = <0xee098 0xee098 0x149970>;
			opp-microvolt-L0 = <0xee098 0xee098 0x149970>;
			opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0x149970>;
			opp-microvolt-L2 = <0xe7ef0 0xe7ef0 0x149970>;
			opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0x149970>;
			clock-latency-ns = <0x9c40>;
		};

		opp-600000000 {
			opp-hz = <0x0 0x23c34600>;
			opp-microvolt = <0xee098 0xee098 0x149970>;
			opp-microvolt-L0 = <0xee098 0xee098 0x149970>;
			opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0x149970>;
			opp-microvolt-L2 = <0xe7ef0 0xe7ef0 0x149970>;
			opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0x149970>;
			clock-latency-ns = <0x9c40>;
		};

		opp-816000000 {
			opp-hz = <0x0 0x30a32c00>;
			opp-microvolt = <0x106738 0x106738 0x149970>;
			opp-microvolt-L0 = <0x106738 0x106738 0x149970>;
			opp-microvolt-L1 = <0x100590 0x100590 0x149970>;
			opp-microvolt-L2 = <0xf4240 0xf4240 0x149970>;
			opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0x149970>;
			clock-latency-ns = <0x9c40>;
			opp-suspend;
		};

		opp-1008000000 {
			opp-hz = <0x0 0x3c14dc00>;
			opp-microvolt = <0x118c30 0x118c30 0x149970>;
			opp-microvolt-L0 = <0x118c30 0x118c30 0x149970>;
			opp-microvolt-L1 = <0x10c8e0 0x10c8e0 0x149970>;
			opp-microvolt-L2 = <0x100590 0x100590 0x149970>;
			opp-microvolt-L3 = <0xf4240 0xf4240 0x149970>;
			clock-latency-ns = <0x9c40>;
		};

		opp-1200000000 {
			opp-hz = <0x0 0x47868c00>;
			opp-microvolt = <0x124f80 0x124f80 0x149970>;
			opp-microvolt-L0 = <0x124f80 0x124f80 0x149970>;
			opp-microvolt-L1 = <0x118c30 0x118c30 0x149970>;
			opp-microvolt-L2 = <0x10c8e0 0x10c8e0 0x149970>;
			opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
			clock-latency-ns = <0x9c40>;
		};

		opp-1416000000 {
			opp-hz = <0x0 0x54667200>;
			opp-microvolt = <0x13d620 0x13d620 0x149970>;
			opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
			opp-microvolt-L1 = <0x1312d0 0x1312d0 0x149970>;
			opp-microvolt-L2 = <0x124f80 0x124f80 0x149970>;
			opp-microvolt-L3 = <0x118c30 0x118c30 0x149970>;
			clock-latency-ns = <0x9c40>;
		};

		opp-1608000000 {
			opp-hz = <0x0 0x5fd82200>;
			opp-microvolt = <0x149970 0x149970 0x149970>;
			opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
			opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
			opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
			opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
			clock-latency-ns = <0x9c40>;
		};
	};

	amba {
		compatible = "arm,amba-bus";
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;

		dma-controller@ff250000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x0 0xff250000 0x0 0x4000>;
			interrupts = <0x0 0x2 0x4 0x0 0x3 0x4>;
			#dma-cells = <0x1>;
			arm,pl330-broken-no-flushp;
			peripherals-req-type-burst;
			clocks = <0x7 0xc2>;
			clock-names = "apb_pclk";
			phandle = <0x26>;
		};

		dma-controller@ff600000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x0 0xff600000 0x0 0x4000>;
			interrupts = <0x0 0x0 0x4 0x0 0x1 0x4>;
			#dma-cells = <0x1>;
			arm,pl330-broken-no-flushp;
			peripherals-req-type-burst;
			clocks = <0x7 0xc1>;
			clock-names = "apb_pclk";
			status = "disabled";
		};

		dma-controller@ffb20000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x0 0xff600000 0x0 0x4000>;
			interrupts = <0x0 0x0 0x4 0x0 0x1 0x4>;
			#dma-cells = <0x1>;
			arm,pl330-broken-no-flushp;
			peripherals-req-type-burst;
			clocks = <0x7 0xc1>;
			clock-names = "apb_pclk";
			phandle = <0x7b>;
		};
	};

	reserved-memory {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;

		dma-unusable@fe000000 {
			reg = <0x0 0xfe000000 0x0 0x1000000>;
		};

		ramoops@00000000 {
			reg = <0x0 0x8000000 0x0 0xf0000>;
			phandle = <0xb0>;
		};

		drm-logo@00000000 {
			compatible = "rockchip,drm-logo";
			reg = <0x0 0x0 0x0 0x0>;
			phandle = <0x11>;
		};
	};

	oscillator {
		compatible = "fixed-clock";
		clock-frequency = <0x16e3600>;
		clock-output-names = "xin24m";
		#clock-cells = <0x0>;
		phandle = <0x69>;
	};

	timer {
		compatible = "arm,armv7-timer";
		arm,cpu-registers-not-fw-configured;
		interrupts = <0x1 0xd 0xf04 0x1 0xe 0xf04 0x1 0xb 0xf04 0x1 0xa 0xf04>;
		clock-frequency = <0x16e3600>;
	};

	display-subsystem {
		compatible = "rockchip,display-subsystem";
		ports = <0xf 0x10>;
		status = "okay";
		logo-memory-region = <0x11>;

		route {

			route-edp {
				status = "disabled";
				logo,uboot = "logo.bmp";
				logo,kernel = "logo_kernel.bmp";
				logo,mode = "center";
				charge_logo,mode = "center";
				connect = <0x12>;
			};

			route-dsi0 {
				status = "disabled";
				logo,uboot = "logo.bmp";
				logo,kernel = "logo_kernel.bmp";
				logo,mode = "center";
				charge_logo,mode = "center";
				connect = <0x13>;
			};

			route-lvds {
				status = "disabled";
				logo,uboot = "logo.bmp";
				logo,kernel = "logo_kernel.bmp";
				logo,mode = "center";
				charge_logo,mode = "center";
				connect = <0x14>;
			};

			route-hdmi {
				status = "disabled";
				logo,uboot = "logo.bmp";
				logo,kernel = "logo_kernel.bmp";
				logo,mode = "center";
				charge_logo,mode = "center";
				connect = <0x15>;
			};
		};
	};

	dwmmc@ff0c0000 {
		compatible = "rockchip,rk3288-dw-mshc";
		clock-freq-min-max = <0x61a80 0x8f0d180>;
		clocks = <0x7 0x1c8 0x7 0x44 0x7 0x72 0x7 0x76>;
		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
		fifo-depth = <0x100>;
		interrupts = <0x0 0x20 0x4>;
		reg = <0x0 0xff0c0000 0x0 0x4000>;
		status = "okay";
		supports-sd;
		bus-width = <0x4>;
		cap-mmc-highspeed;
		cap-sd-highspeed;
		card-detect-delay = <0xc8>;
		disable-wp;
		num-slots = <0x1>;
		pinctrl-names = "default";
		pinctrl-0 = <0x16 0x17 0x18 0x19>;
		vmmc-supply = <0x1a>;
		vqmmc-supply = <0x1b>;
	};

	dwmmc@ff0d0000 {
		compatible = "rockchip,rk3288-dw-mshc";
		clock-freq-min-max = <0x30d40 0x2faf080>;
		clocks = <0x7 0x1c9 0x7 0x45 0x7 0x73 0x7 0x77>;
		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
		fifo-depth = <0x100>;
		interrupts = <0x0 0x21 0x4>;
		reg = <0x0 0xff0d0000 0x0 0x4000>;
		status = "okay";
		max-frequency = <0x8f0d180>;
		clock-frequency = <0x2faf080>;
		bus-width = <0x4>;
		cap-sd-highspeed;
		cap-sdio-irq;
		disable-wp;
		keep-power-in-suspend;
		mmc-pwrseq = <0x1c>;
		non-removable;
		num-slots = <0x1>;
		pinctrl-names = "default";
		pinctrl-0 = <0x1d 0x1e 0x1f 0x20>;
		supports-sdio;
	};

	dwmmc@ff0e0000 {
		compatible = "rockchip,rk3288-dw-mshc";
		clock-freq-min-max = <0x61a80 0x8f0d180>;
		clocks = <0x7 0x1ca 0x7 0x46 0x7 0x74 0x7 0x78>;
		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
		fifo-depth = <0x100>;
		interrupts = <0x0 0x22 0x4>;
		reg = <0x0 0xff0e0000 0x0 0x4000>;
		status = "disabled";
	};

	dwmmc@ff0f0000 {
		compatible = "rockchip,rk3288-dw-mshc";
		clock-freq-min-max = <0x61a80 0x8f0d180>;
		clocks = <0x7 0x1cb 0x7 0x47 0x7 0x75 0x7 0x79>;
		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
		fifo-depth = <0x100>;
		interrupts = <0x0 0x23 0x4>;
		reg = <0x0 0xff0f0000 0x0 0x4000>;
		status = "okay";
		supports-emmc;
		bus-width = <0x8>;
		cap-mmc-highspeed;
		disable-wp;
		non-removable;
		num-slots = <0x1>;
		pinctrl-names = "default";
		pinctrl-0 = <0x21 0x22 0x23 0x24>;
		max-frequency = <0x47868c0>;
		mmc-hs200-1_8v;
		mmc-ddr-1_8v;
	};

	saradc@ff100000 {
		compatible = "rockchip,saradc";
		reg = <0x0 0xff100000 0x0 0x100>;
		interrupts = <0x0 0x24 0x4>;
		#io-channel-cells = <0x1>;
		clocks = <0x7 0x49 0x7 0x15b>;
		clock-names = "saradc", "apb_pclk";
		resets = <0x7 0x57>;
		reset-names = "saradc-apb";
		status = "okay";
		vref-supply = <0x25>;
		phandle = <0xb4>;
	};

	spi@ff110000 {
		compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi";
		clocks = <0x7 0x41 0x7 0x152>;
		clock-names = "spiclk", "apb_pclk";
		dmas = <0x26 0xb 0x26 0xc>;
		dma-names = "tx", "rx";
		interrupts = <0x0 0x2c 0x4>;
		pinctrl-names = "default";
		pinctrl-0 = <0x27 0x28 0x29 0x2a>;
		reg = <0x0 0xff110000 0x0 0x1000>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";
		max-freq = <0x2dc6c00>;
	};

	spi@ff120000 {
		compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi";
		clocks = <0x7 0x42 0x7 0x153>;
		clock-names = "spiclk", "apb_pclk";
		dmas = <0x26 0xd 0x26 0xe>;
		dma-names = "tx", "rx";
		interrupts = <0x0 0x2d 0x4>;
		pinctrl-names = "default";
		pinctrl-0 = <0x2b 0x2c 0x2d 0x2e>;
		reg = <0x0 0xff120000 0x0 0x1000>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "okay";
		max-freq = <0x2dc6c00>;

		m25p80@0 {
			compatible = "w25q32";
			spi-max-frequency = <0x16e3600>;
			reg = <0x0>;
		};
	};

	spi@ff130000 {
		compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi";
		clocks = <0x7 0x43 0x7 0x154>;
		clock-names = "spiclk", "apb_pclk";
		dmas = <0x26 0xf 0x26 0x10>;
		dma-names = "tx", "rx";
		interrupts = <0x0 0x2e 0x4>;
		pinctrl-names = "default";
		pinctrl-0 = <0x2f 0x30 0x31 0x32 0x33>;
		reg = <0x0 0xff130000 0x0 0x1000>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "okay";
		num-cs = <0x2>;
		max-freq = <0x2dc6c00>;

		m25p80@0 {
			compatible = "w25q32";
			spi-max-frequency = <0x16e3600>;
			reg = <0x0>;
		};
	};

	i2c@ff650000 {
		compatible = "rockchip,rk3288-i2c";
		reg = <0x0 0xff650000 0x0 0x1000>;
		interrupts = <0x0 0x3c 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		clock-names = "i2c";
		clocks = <0x7 0x14c>;
		pinctrl-names = "default";
		pinctrl-0 = <0x34>;
		status = "okay";
		clock-frequency = <0x186a0>;

		pmic@1b {
			compatible = "rockchip,rk808";
			reg = <0x1b>;
			interrupt-parent = <0x35>;
			interrupts = <0x4 0x8>;
			pinctrl-names = "default";
			pinctrl-0 = <0x36 0x37>;
			rockchip,system-power-controller;
			wakeup-source;
			#clock-cells = <0x1>;
			clock-output-names = "rk808-clkout1", "rk808-clkout2";
			vcc1-supply = <0x38>;
			vcc2-supply = <0x38>;
			vcc3-supply = <0x38>;
			vcc4-supply = <0x38>;
			vcc6-supply = <0x38>;
			vcc7-supply = <0x38>;
			vcc8-supply = <0x39>;
			vcc9-supply = <0x39>;
			vcc10-supply = <0x39>;
			vcc11-supply = <0x39>;
			vcc12-supply = <0x39>;
			vddio-supply = <0x39>;
			phandle = <0xbe>;

			regulators {

				DCDC_REG1 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0xaae60>;
					regulator-max-microvolt = <0x16e360>;
					regulator-name = "vdd_arm";
					phandle = <0x9>;

					regulator-state-mem {
						regulator-off-in-suspend;
					};
				};

				DCDC_REG2 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0xdbba0>;
					regulator-max-microvolt = <0x16e360>;
					regulator-name = "vdd_gpu";
					regulator-ramp-delay = <0x1770>;
					phandle = <0xa1>;

					regulator-state-mem {
						regulator-off-in-suspend;
					};
				};

				DCDC_REG3 {
					regulator-always-on;
					regulator-boot-on;
					regulator-name = "vcc_ddr";

					regulator-state-mem {
						regulator-on-in-suspend;
					};
				};

				DCDC_REG4 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x325aa0>;
					regulator-max-microvolt = <0x325aa0>;
					regulator-name = "vcc_io";
					phandle = <0x39>;

					regulator-state-mem {
						regulator-on-in-suspend;
						regulator-suspend-microvolt = <0x325aa0>;
					};
				};

				LDO_REG1 {
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-name = "vcc_flash_unused";

					regulator-state-mem {
						regulator-off-in-suspend;
					};
				};

				LDO_REG2 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x325aa0>;
					regulator-init-microvolt = <0x325aa0>;
					regulator-max-microvolt = <0x325aa0>;
					regulator-name = "vcca_33";
					phandle = <0x7a>;

					regulator-state-mem {
						regulator-off-in-suspend;
					};
				};

				LDO_REG3 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x10c8e0>;
					regulator-init-microvolt = <0x10c8e0>;
					regulator-max-microvolt = <0x10c8e0>;
					regulator-name = "vdd_10";

					regulator-state-mem {
						regulator-on-in-suspend;
						regulator-suspend-microvolt = <0x10c8e0>;
					};
				};

				LDO_REG4 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x1b7740>;
					regulator-init-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-name = "vcca_18";
					phandle = <0x78>;

					regulator-state-mem {
						regulator-off-in-suspend;
					};
				};

				LDO_REG5 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x325aa0>;
					regulator-init-microvolt = <0x325aa0>;
					regulator-max-microvolt = <0x325aa0>;
					regulator-name = "vccio_sd";
					phandle = <0x1b>;

					regulator-state-mem {
						regulator-on-in-suspend;
						regulator-suspend-microvolt = <0x325aa0>;
					};
				};

				LDO_REG6 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x10c8e0>;
					regulator-init-microvolt = <0x10c8e0>;
					regulator-max-microvolt = <0x10c8e0>;
					regulator-name = "vcc10_lcd";

					regulator-state-mem {
						regulator-off-in-suspend;
					};
				};

				LDO_REG7 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x1b7740>;
					regulator-init-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-name = "vcc_18";
					phandle = <0x25>;

					regulator-state-mem {
						regulator-on-in-suspend;
						regulator-suspend-microvolt = <0x1b7740>;
					};
				};

				LDO_REG8 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x1b7740>;
					regulator-init-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-name = "vcc18_lcd";

					regulator-state-mem {
						regulator-off-in-suspend;
					};
				};

				SWITCH_REG1 {
					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x325aa0>;
					regulator-init-microvolt = <0x325aa0>;
					regulator-max-microvolt = <0x325aa0>;
					regulator-name = "vcc_sd";
					phandle = <0x1a>;

					regulator-state-mem {
						regulator-on-in-suspend;
					};
				};

				SWITCH_REG2 {
					regulator-min-microvolt = <0x325aa0>;
					regulator-max-microvolt = <0x325aa0>;
					regulator-name = "phy_vddio_unused";

					regulator-state-mem {
						regulator-off-in-suspend;
					};
				};
			};
		};

		rtc@30 {
			compatible = "s35390a";
			reg = <0x30>;
		};
	};

	i2c@ff140000 {
		compatible = "rockchip,rk3288-i2c";
		reg = <0x0 0xff140000 0x0 0x1000>;
		interrupts = <0x0 0x3e 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		clock-names = "i2c";
		clocks = <0x7 0x14d>;
		pinctrl-names = "default";
		pinctrl-0 = <0x3a>;
		status = "okay";
		clock-frequency = <0x61a80>;
	};

	i2c@ff150000 {
		compatible = "rockchip,rk3288-i2c";
		reg = <0x0 0xff150000 0x0 0x1000>;
		interrupts = <0x0 0x3f 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		clock-names = "i2c";
		clocks = <0x7 0x14f>;
		pinctrl-names = "default";
		pinctrl-0 = <0x3b>;
		status = "okay";
	};

	i2c@ff160000 {
		compatible = "rockchip,rk3288-i2c";
		reg = <0x0 0xff160000 0x0 0x1000>;
		interrupts = <0x0 0x40 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		clock-names = "i2c";
		clocks = <0x7 0x150>;
		pinctrl-names = "default";
		pinctrl-0 = <0x3c>;
		status = "okay";

		eeprom@50 {
			compatible = "atmel,24c32";
			reg = <0x50>;
			pagesize = <0x20>;
		};

		tsc2007@4b {
			compatible = "ti,tsc2007";
			reg = <0x4b>;
			interrupt-parent = <0x35>;
			interrupts = <0x6 0x2>;
			gpios = <0x35 0x6 0x1>;
			ti,x-plate-ohms = <0xb4>;
			linux,wakeup;
		};
	};

	i2c@ff170000 {
		compatible = "rockchip,rk3288-i2c";
		reg = <0x0 0xff170000 0x0 0x1000>;
		interrupts = <0x0 0x41 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		clock-names = "i2c";
		clocks = <0x7 0x151>;
		pinctrl-names = "default";
		pinctrl-0 = <0x3d>;
		status = "disabled";
	};

	serial@ff180000 {
		compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
		reg = <0x0 0xff180000 0x0 0x100>;
		interrupts = <0x0 0x37 0x4>;
		reg-shift = <0x2>;
		reg-io-width = <0x4>;
		clocks = <0x7 0x4d 0x7 0x155>;
		clock-names = "baudclk", "apb_pclk";
		pinctrl-names = "default";
		pinctrl-0 = <0x3e 0x3f>;
		status = "okay";
		dmas = <0x26 0x1 0x26 0x2>;
		dma-names = "tx", "rx";
	};

	serial@ff190000 {
		compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
		reg = <0x0 0xff190000 0x0 0x100>;
		interrupts = <0x0 0x38 0x4>;
		reg-shift = <0x2>;
		reg-io-width = <0x4>;
		clocks = <0x7 0x4e 0x7 0x156>;
		clock-names = "baudclk", "apb_pclk";
		pinctrl-names = "default", "rts_gpio";
		pinctrl-0 = <0x40 0x41 0x42>;
		status = "okay";
		pinctrl-1 = <0x40 0x43>;
		dmas = <0x26 0x3 0x26 0x4>;
		dma-names = "tx", "rx";
	};

	serial@ff690000 {
		compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
		reg = <0x0 0xff690000 0x0 0x100>;
		interrupts = <0x0 0x39 0x4>;
		reg-shift = <0x2>;
		reg-io-width = <0x4>;
		clocks = <0x7 0x4f 0x7 0x157>;
		clock-names = "baudclk", "apb_pclk";
		pinctrl-names = "default";
		pinctrl-0 = <0x44>;
		status = "okay";
	};

	serial@ff1b0000 {
		compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
		reg = <0x0 0xff1b0000 0x0 0x100>;
		interrupts = <0x0 0x3a 0x4>;
		reg-shift = <0x2>;
		reg-io-width = <0x4>;
		clocks = <0x7 0x50 0x7 0x158>;
		clock-names = "baudclk", "apb_pclk";
		pinctrl-names = "default", "rts_gpio";
		pinctrl-0 = <0x45 0x46 0x47>;
		status = "okay";
		pinctrl-1 = <0x45 0x48>;
		dmas = <0x26 0x7 0x26 0x8>;
		dma-names = "tx", "rx";
	};

	serial@ff1c0000 {
		compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
		reg = <0x0 0xff1c0000 0x0 0x100>;
		interrupts = <0x0 0x3b 0x4>;
		reg-shift = <0x2>;
		reg-io-width = <0x4>;
		clocks = <0x7 0x51 0x7 0x159>;
		clock-names = "baudclk", "apb_pclk";
		pinctrl-names = "default", "rts_gpio";
		pinctrl-0 = <0x49 0x4a 0x4b 0x4c>;
		status = "okay";
		pinctrl-1 = <0x49 0x4c 0x4d>;
		uart-sel-gpio = <0x4e 0x10 0x0>;
		rs485-tx-active = <0x4e 0xd 0x1>;
		dmas = <0x26 0x9 0x26 0xa>;
		dma-names = "tx", "rx";
	};

	thermal-zones {

		soc-thermal {
			polling-delay-passive = <0xc8>;
			polling-delay = <0x3e8>;
			sustainable-power = <0x4b0>;
			thermal-sensors = <0x4f 0x1>;

			trips {

				trip-point@0 {
					temperature = <0x124f8>;
					hysteresis = <0x7d0>;
					type = "passive";
				};

				trip-point@1 {
					temperature = <0x14c08>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x50>;
				};

				soc-crit {
					temperature = <0x1c138>;
					hysteresis = <0x7d0>;
					type = "critical";
				};
			};

			cooling-maps {

				map0 {
					trip = <0x50>;
					cooling-device = <0x2 0xffffffff 0xffffffff>;
					contribution = <0x400>;
				};

				map1 {
					trip = <0x50>;
					cooling-device = <0x51 0xffffffff 0xffffffff>;
					contribution = <0x400>;
				};
			};
		};

		gpu-thermal {
			polling-delay-passive = <0xc8>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x4f 0x2>;
		};
	};

	tsadc@ff280000 {
		compatible = "rockchip,rk3288-tsadc";
		reg = <0x0 0xff280000 0x0 0x100>;
		interrupts = <0x0 0x25 0x4>;
		clocks = <0x7 0x48 0x7 0x15a>;
		clock-names = "tsadc", "apb_pclk";
		assigned-clocks = <0x7 0x48>;
		assigned-clock-rates = <0x1388>;
		resets = <0x7 0x9f>;
		reset-names = "tsadc-apb";
		pinctrl-names = "init", "default", "sleep";
		pinctrl-0 = <0x52>;
		pinctrl-1 = <0x52>;
		pinctrl-2 = <0x52>;
		#thermal-sensor-cells = <0x1>;
		rockchip,hw-tshut-temp = <0x1d4c0>;
		rockchip,hw-tshut-mode = <0x1>;
		status = "okay";
		rockchip,grf = <0x53>;
		rockchip,hw-tshut-polarity = <0x0>;
		phandle = <0x4f>;
	};

	ethernet@ff290000 {
		compatible = "rockchip,rk3288-gmac";
		reg = <0x0 0xff290000 0x0 0x10000>;
		interrupts = <0x0 0x1b 0x4 0x0 0x1c 0x4>;
		interrupt-names = "macirq", "eth_wake_irq";
		rockchip,grf = <0x53>;
		clocks = <0x7 0x97 0x7 0x66 0x7 0x67 0x7 0x63 0x7 0x98 0x7 0xc4 0x7 0x15d>;
		clock-names = "stmmaceth", "mac_clk_rx", "mac_clk_tx", "clk_mac_ref", "clk_mac_refout", "aclk_mac", "pclk_mac";
		resets = <0x7 0x42>;
		reset-names = "stmmaceth";
		status = "okay";
		phy-supply = <0x54>;
		phy-mode = "rgmii";
		clock_in_out = "input";
		snps,reset-gpio = <0x55 0x7 0x0>;
		snps,reset-active-low;
		snps,reset-delays-us = <0x0 0x3e8 0x30d40>;
		assigned-clocks = <0x7 0x97>;
		assigned-clock-parents = <0x56>;
		pinctrl-names = "default";
		pinctrl-0 = <0x57 0x58>;
		tx_delay = <0x0>;
		rx_delay = <0x0>;
		max-speed = <0x3e8>;
		phy_reg_config = <0x14 0x200 0x200 0x18 0xfff 0x65b 0x1e 0x200 0x200 0x32 0x3 0x3 0x86 0xff 0x80 0x170 0x1f00 0x0>;
	};

	usb@ff500000 {
		compatible = "generic-ehci";
		reg = <0x0 0xff500000 0x0 0x20000>;
		interrupts = <0x0 0x18 0x4>;
		clocks = <0x7 0x1c2 0x59>;
		clock-names = "usbhost", "utmi";
		phys = <0x59>;
		phy-names = "usb";
		status = "okay";
		rockchip-relinquish-port;
	};

	usb@ff520000 {
		compatible = "generic-ohci";
		reg = <0x0 0xff520000 0x0 0x20000>;
		interrupts = <0x0 0x29 0x4>;
		clocks = <0x7 0x1c2 0x59>;
		clock-names = "usbhost", "utmi";
		phys = <0x59>;
		phy-names = "usb";
		status = "okay";
	};

	usb@ff540000 {
		compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2";
		reg = <0x0 0xff540000 0x0 0x40000>;
		interrupts = <0x0 0x19 0x4>;
		clocks = <0x7 0x1c3>;
		clock-names = "otg";
		dr_mode = "host";
		phys = <0x5a>;
		phy-names = "usb2-phy";
		status = "okay";
	};

	usb@ff580000 {
		compatible = "rockchip,rk3288_usb20_otg";
		reg = <0x0 0xff580000 0x0 0x40000>;
		interrupts = <0x0 0x17 0x4>;
		clocks = <0x5b 0x7 0x1c1>;
		clock-names = "clk_usbphy0", "hclk_usb0";
		dr_mode = "otg";
		g-np-tx-fifo-size = <0x10>;
		g-rx-fifo-size = <0x118>;
		g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
		g-use-dma;
		phys = <0x5b>;
		phy-names = "usb2-phy";
		status = "okay";
		resets = <0x7 0x84 0x7 0x85 0x7 0x86>;
		reset-names = "otg_ahb", "otg_phy", "otg_controller";
		rockchip,usb-mode = <0x0>;
	};

	usb@ff5c0000 {
		compatible = "generic-ehci";
		reg = <0x0 0xff5c0000 0x0 0x100>;
		interrupts = <0x0 0x1a 0x4>;
		clocks = <0x7 0x1c4>;
		clock-names = "usbhost";
		status = "disabled";
	};

	i2c@ff660000 {
		compatible = "rockchip,rk3288-i2c";
		reg = <0x0 0xff660000 0x0 0x1000>;
		interrupts = <0x0 0x3d 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		clock-names = "i2c";
		clocks = <0x7 0x14e>;
		pinctrl-names = "default";
		pinctrl-0 = <0x5c>;
		status = "okay";

		rt5660@1c {
			#sound-dai-cells = <0x0>;
			compatible = "realtek,rt5660";
			rockchip,cru = <0x7>;
			rockchip,grf = <0x53>;
			reg = <0x1c>;
			codec-avdd-gpio = <0x5d 0xa 0x1>;
			codec-avdd-delay = <0x64>;
			codec-micvdd-gpio = <0x5d 0xb 0x0>;
			codec-spkvdd-gpio = <0x5d 0xc 0x0>;
			amp-shutdown-gpio = <0x5d 0xd 0x1>;
			amp-mute-gpio = <0x5e 0x5 0x0>;
			clocks = <0x7 0x71>;
			clock-names = "mclk";
			interrupt-parent = <0x5e>;
			interrupts = <0x7 0x2>;
			pinctrl-names = "default";
			pinctrl-0 = <0x5f 0x60 0x61 0x62 0x63 0x64>;
			phandle = <0xb9>;
		};
	};

	pwm@ff680000 {
		compatible = "rockchip,rk3288-pwm";
		reg = <0x0 0xff680000 0x0 0x10>;
		#pwm-cells = <0x3>;
		pinctrl-names = "active";
		pinctrl-0 = <0x65>;
		clocks = <0x7 0x15e>;
		clock-names = "pwm";
		status = "okay";
	};

	pwm@ff680010 {
		compatible = "rockchip,rk3288-pwm";
		reg = <0x0 0xff680010 0x0 0x10>;
		#pwm-cells = <0x3>;
		pinctrl-names = "active";
		pinctrl-0 = <0x66>;
		clocks = <0x7 0x15e>;
		clock-names = "pwm";
		status = "okay";
		phandle = <0xb3>;
	};

	pwm@ff680020 {
		compatible = "rockchip,rk3288-pwm";
		reg = <0x0 0xff680020 0x0 0x10>;
		#pwm-cells = <0x3>;
		pinctrl-names = "active";
		pinctrl-0 = <0x67>;
		clocks = <0x7 0x15e>;
		clock-names = "pwm";
		status = "disabled";
	};

	pwm@ff680030 {
		compatible = "rockchip,rk3288-pwm";
		reg = <0x0 0xff680030 0x0 0x10>;
		#pwm-cells = <0x2>;
		pinctrl-names = "active";
		pinctrl-0 = <0x68>;
		clocks = <0x7 0x15e>;
		clock-names = "pwm";
		status = "disabled";
	};

	timer@ff6b0000 {
		compatible = "rockchip,rk3288-timer";
		reg = <0x0 0xff6b0000 0x0 0x20>;
		interrupts = <0x0 0x42 0x4>;
		clocks = <0x69 0x7 0x161>;
		clock-names = "timer", "pclk";
	};

	bus_intmem@ff700000 {
		compatible = "mmio-sram";
		reg = <0x0 0xff700000 0x0 0x18000>;
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges = <0x0 0x0 0xff700000 0x18000>;

		smp-sram@0 {
			compatible = "rockchip,rk3066-smp-sram";
			reg = <0x0 0x10>;
		};

		ddr-sram@1000 {
			compatible = "rockchip,rk3288-ddr-sram";
			reg = <0x1000 0x4000>;
		};
	};

	sram@ff720000 {
		compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
		reg = <0x0 0xff720000 0x0 0x1000>;
	};

	qos@ffaa0000 {
		compatible = "syscon";
		reg = <0x0 0xffaa0000 0x0 0x20>;
		phandle = <0x76>;
	};

	qos@ffaa0080 {
		compatible = "syscon";
		reg = <0x0 0xffaa0080 0x0 0x20>;
		phandle = <0x77>;
	};

	qos@ffad0000 {
		compatible = "syscon";
		reg = <0x0 0xffad0000 0x0 0x20>;
		phandle = <0x6b>;
	};

	qos@ffad0100 {
		compatible = "syscon";
		reg = <0x0 0xffad0100 0x0 0x20>;
		phandle = <0x6c>;
	};

	qos@ffad0180 {
		compatible = "syscon";
		reg = <0x0 0xffad0180 0x0 0x20>;
		phandle = <0x6d>;
	};

	qos@ffad0400 {
		compatible = "syscon";
		reg = <0x0 0xffad0400 0x0 0x20>;
		phandle = <0x6e>;
	};

	qos@ffad0480 {
		compatible = "syscon";
		reg = <0x0 0xffad0480 0x0 0x20>;
		phandle = <0x6f>;
	};

	qos@ffad0500 {
		compatible = "syscon";
		reg = <0x0 0xffad0500 0x0 0x20>;
		phandle = <0x6a>;
	};

	qos@ffad0800 {
		compatible = "syscon";
		reg = <0x0 0xffad0800 0x0 0x20>;
		phandle = <0x70>;
	};

	qos@ffad0880 {
		compatible = "syscon";
		reg = <0x0 0xffad0880 0x0 0x20>;
		phandle = <0x71>;
	};

	qos@ffad0900 {
		compatible = "syscon";
		reg = <0x0 0xffad0900 0x0 0x20>;
		phandle = <0x72>;
	};

	qos@ffae0000 {
		compatible = "syscon";
		reg = <0x0 0xffae0000 0x0 0x20>;
		phandle = <0x75>;
	};

	qos@ffaf0000 {
		compatible = "syscon";
		reg = <0x0 0xffaf0000 0x0 0x20>;
		phandle = <0x73>;
	};

	qos@ffaf0080 {
		compatible = "syscon";
		reg = <0x0 0xffaf0080 0x0 0x20>;
		phandle = <0x74>;
	};

	power-management@ff730000 {
		compatible = "rockchip,rk3288-pmu", "syscon", "simple-mfd";
		reg = <0x0 0xff730000 0x0 0x100>;
		phandle = <0x6>;

		power-controller {
			compatible = "rockchip,rk3288-power-controller";
			#power-domain-cells = <0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x7f>;

			pd_vio@9 {
				reg = <0x9>;
				clocks = <0x7 0xca 0x7 0xcd 0x7 0xc8 0x7 0xcc 0x7 0xc5 0x7 0xc6 0x7 0xbe 0x7 0xbf 0x7 0x1d4 0x7 0x1d5 0x7 0x1d6 0x7 0x1d9 0x7 0x1d1 0x7 0x1d2 0x7 0x163 0x7 0x168 0x7 0x167 0x7 0x166 0x7 0x164 0x7 0x165 0x7 0x68 0x7 0x69 0x7 0x6c 0x7 0x6b 0x7 0x6a>;
				pm_qos = <0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72>;
			};

			pd_hevc@11 {
				reg = <0xb>;
				clocks = <0x7 0xcf 0x7 0x6f 0x7 0x70>;
				pm_qos = <0x73 0x74>;
			};

			pd_video@12 {
				reg = <0xc>;
				clocks = <0x7 0xd0 0x7 0x1dc>;
				pm_qos = <0x75>;
			};

			pd_gpu@13 {
				reg = <0xd>;
				clocks = <0x7 0xc0>;
				pm_qos = <0x76 0x77>;
			};
		};

		reboot-mode {
			compatible = "syscon-reboot-mode";
			offset = <0x94>;
			mode-normal = <0x5242c300>;
			mode-recovery = <0x5242c303>;
			mode-bootloader = <0x5242c309>;
			mode-loader = <0x5242c301>;
			mode-ums = <0x5242c30c>;
		};
	};

	syscon@ff740000 {
		compatible = "rockchip,rk3288-sgrf", "syscon";
		reg = <0x0 0xff740000 0x0 0x1000>;
	};

	clock-controller@ff760000 {
		compatible = "rockchip,rk3288-cru";
		reg = <0x0 0xff760000 0x0 0x1000>;
		rockchip,grf = <0x53>;
		#clock-cells = <0x1>;
		#reset-cells = <0x1>;
		assigned-clocks = <0x7 0x4 0x7 0x5 0x7 0xd1 0x7 0x1dd 0x7 0x16a 0x7 0xd2 0x7 0x1de 0x7 0x16b>;
		assigned-clock-rates = <0x2367b880 0x1dcd6500 0x11e1a300 0x8f0d180 0x47868c0 0x11e1a300 0x8f0d180 0x47868c0>;
		phandle = <0x7>;
	};

	syscon@ff770000 {
		compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
		reg = <0x0 0xff770000 0x0 0x1000>;
		phandle = <0x53>;

		edp-phy {
			compatible = "rockchip,rk3288-dp-phy";
			clocks = <0x7 0x68>;
			clock-names = "24m";
			#phy-cells = <0x0>;
			status = "disabled";
			phandle = <0x96>;
		};

		mipi-phy-rx0 {
			compatible = "rockchip,rk3288-mipi-dphy";
			clocks = <0x7 0x7e 0x7 0x166>;
			clock-names = "dphy-ref", "pclk";
			status = "disabled";
		};

		io-domains {
			compatible = "rockchip,rk3288-io-voltage-domain";
			status = "okay";
			audio-supply = <0x78>;
			bb-supply = <0x39>;
			dvp-supply = <0x39>;
			flash0-supply = <0x79>;
			flash1-supply = <0x54>;
			gpio30-supply = <0x39>;
			gpio1830 = <0x39>;
			lcdc-supply = <0x7a>;
			sdcard-supply = <0x1b>;
			wifi-supply = <0x39>;
		};

		usbphy {
			compatible = "rockchip,rk3288-usb-phy";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "okay";

			usb-phy@320 {
				#phy-cells = <0x0>;
				reg = <0x320>;
				clocks = <0x7 0x5d>;
				clock-names = "phyclk";
				#clock-cells = <0x0>;
				resets = <0x7 0x85>;
				reset-names = "phy-reset";
				phandle = <0x5b>;
			};

			usb-phy@334 {
				#phy-cells = <0x0>;
				reg = <0x334>;
				clocks = <0x7 0x5e>;
				clock-names = "phyclk";
				#clock-cells = <0x0>;
				phandle = <0x59>;
			};

			usb-phy@348 {
				#phy-cells = <0x0>;
				reg = <0x348>;
				clocks = <0x7 0x5f>;
				clock-names = "phyclk";
				#clock-cells = <0x0>;
				resets = <0x7 0x8b>;
				reset-names = "phy-reset";
				phandle = <0x5a>;
			};
		};

		pvtm {
			compatible = "rockchip,rk3288-pvtm";
			clocks = <0x7 0x7b 0x7 0x7c>;
			clock-names = "core", "gpu";
			resets = <0x7 0x7c 0x7 0x7d>;
			reset-names = "core", "gpu";
			status = "okay";
		};
	};

	watchdog@ff800000 {
		compatible = "rockchip,rk3288-wdt", "snps,dw-wdt";
		reg = <0x0 0xff800000 0x0 0x100>;
		clocks = <0x7 0x170>;
		interrupts = <0x0 0x4f 0x4>;
		status = "okay";
	};

	cypto-controller@ff8a0000 {
		compatible = "rockchip,rk3288-crypto";
		reg = <0x0 0xff8a0000 0x0 0x4000>;
		interrupts = <0x0 0x30 0x4>;
		clocks = <0x7 0xc7 0x7 0x1cd 0x7 0x7d 0x7 0xc1>;
		clock-names = "aclk", "hclk", "sclk", "apb_pclk";
		resets = <0x7 0xae>;
		reset-names = "crypto-rst";
		status = "okay";
	};

	sound@ff8b0000 {
		compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
		reg = <0x0 0xff8b0000 0x0 0x10000>;
		#sound-dai-cells = <0x0>;
		clock-names = "hclk", "mclk";
		clocks = <0x7 0x1d0 0x7 0x54>;
		dmas = <0x7b 0x3>;
		dma-names = "tx";
		interrupts = <0x0 0x36 0x4>;
		pinctrl-names = "default";
		pinctrl-0 = <0x7c>;
		rockchip,grf = <0x53>;
		status = "disabled";
	};

	i2s@ff890000 {
		compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
		reg = <0x0 0xff890000 0x0 0x10000>;
		interrupts = <0x0 0x35 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		dmas = <0x7b 0x0 0x7b 0x1>;
		dma-names = "tx", "rx";
		clock-names = "i2s_hclk", "i2s_clk";
		clocks = <0x7 0x1ce 0x7 0x52>;
		assigned-clocks = <0x7 0x81>;
		assigned-clock-parents = <0x7 0x4>;
		pinctrl-names = "default";
		pinctrl-0 = <0x7d>;
		rockchip,playback-channels = <0x8>;
		rockchip,capture-channels = <0x2>;
		status = "okay";
		#sound-dai-cells = <0x0>;
		phandle = <0xb8>;
	};

	iep@ff90000 {
		compatible = "rockchip,iep";
		iommu_enabled = <0x1>;
		iommus = <0x7e>;
		reg = <0x0 0xff900000 0x0 0x800>;
		interrupts = <0x0 0x11 0x4>;
		clocks = <0x7 0xca 0x7 0x1d4>;
		clock-names = "aclk_iep", "hclk_iep";
		power-domains = <0x7f 0x9>;
		allocator = <0x1>;
		version = <0x1>;
		status = "okay";
	};

	iommu@ff900800 {
		compatible = "rockchip,iommu";
		reg = <0x0 0xff900800 0x0 0x40>;
		interrupts = <0x0 0x11 0x4>;
		interrupt-names = "iep_mmu";
		#iommu-cells = <0x0>;
		status = "okay";
		phandle = <0x7e>;
	};

	cif_isp@ff910000 {
		compatible = "rockchip,rk3288-cif-isp";
		rockchip,grf = <0x53>;
		reg = <0x0 0xff910000 0x0 0x4000 0x0 0xff968000 0x0 0x4000>;
		reg-names = "register", "csihost-register";
		clocks = <0x7 0xcd 0x7 0x1d5 0x7 0x6b 0x7 0x6c 0x7 0x166 0x7 0x173 0x7 0x7e>;
		clock-names = "aclk_isp", "hclk_isp", "sclk_isp", "sclk_isp_jpe", "pclk_mipi_csi", "pclk_isp_in", "sclk_mipidsi_24m";
		resets = <0x7 0x6e>;
		reset-names = "rst_isp";
		interrupts = <0x0 0xe 0x4>;
		interrupt-names = "cif_isp10_irq";
		power-domains = <0x7f 0x9>;
		rockchip,isp,iommu-enable = <0x1>;
		iommus = <0x80>;
		status = "okay";
	};

	isp@ff910000 {
		compatible = "rockchip,rk3288-isp", "rockchip,isp";
		reg = <0x0 0xff910000 0x0 0x4000>;
		interrupts = <0x0 0xe 0x4>;
		power-domains = <0x7f 0x9>;
		clocks = <0x7 0xcd 0x7 0x1d5 0x7 0x6b 0x7 0x6c 0x7 0x173 0x7 0x7f 0x7 0x7e 0x7 0x7f 0x7 0x166>;
		clock-names = "aclk_isp", "hclk_isp", "clk_isp", "clk_isp_jpe", "pclkin_isp", "clk_cif_out", "clk_mipi_24m", "clk_cif_pll", "hclk_mipiphy1";
		pinctrl-names = "default", "isp_dvp8bit2", "isp_dvp10bit", "isp_dvp12bit", "isp_dvp8bit0", "isp_mipi_fl", "isp_mipi_fl_prefl";
		pinctrl-0 = <0x81>;
		pinctrl-1 = <0x81 0x82>;
		pinctrl-2 = <0x81 0x82 0x83>;
		pinctrl-3 = <0x81 0x82 0x83 0x84>;
		pinctrl-4 = <0x81 0x85>;
		pinctrl-5 = <0x81>;
		pinctrl-6 = <0x81 0x86>;
		rockchip,isp,mipiphy = <0x2>;
		rockchip,isp,cifphy = <0x1>;
		rockchip,isp,mipiphy1,reg = <0xff968000 0x4000>;
		rockchip,grf = <0x53>;
		rockchip,cru = <0x7>;
		rockchip,isp,iommu_enable = <0x1>;
		iommus = <0x80>;
		status = "okay";
	};

	iommu@ff914000 {
		compatible = "rockchip,iommu";
		reg = <0x0 0xff914000 0x0 0x100 0x0 0xff915000 0x0 0x100>;
		interrupts = <0x0 0xe 0x4>;
		interrupt-names = "isp_mmu";
		clocks = <0x7 0xcd 0x7 0x1d5>;
		clock-names = "aclk", "hclk";
		rk_iommu,disable_reset_quirk;
		#iommu-cells = <0x0>;
		power-domains = <0x7f 0x9>;
		status = "okay";
		phandle = <0x80>;
	};

	rga@ff920000 {
		compatible = "rockchip,rga2";
		reg = <0x0 0xff920000 0x0 0x180>;
		interrupts = <0x0 0x12 0x4>;
		clocks = <0x7 0xc8 0x7 0x1d6 0x7 0x6a>;
		clock-names = "aclk_rga", "hclk_rga", "clk_rga";
		power-domains = <0x7f 0x9>;
		resets = <0x7 0x69 0x7 0x6c 0x7 0x6d>;
		reset-names = "core", "axi", "ahb";
		status = "okay";
		dma-coherent;
	};

	vop@ff930000 {
		compatible = "rockchip,rk3288-vop-big";
		rockchip,grf = <0x53>;
		reg = <0x0 0xff930000 0x0 0x19c 0x0 0xff931000 0x0 0x1000>;
		reg-names = "regs", "gamma_lut";
		interrupts = <0x0 0xf 0x4>;
		clocks = <0x7 0xc5 0x7 0xbe 0x7 0x1d1>;
		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
		power-domains = <0x7f 0x9>;
		resets = <0x7 0x64 0x7 0x65 0x7 0x66>;
		reset-names = "axi", "ahb", "dclk";
		iommus = <0x87>;
		status = "okay";

		port {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0xf>;

			endpoint@0 {
				reg = <0x0>;
				remote-endpoint = <0x88>;
				phandle = <0x15>;
			};

			endpoint@1 {
				reg = <0x1>;
				remote-endpoint = <0x89>;
				phandle = <0x97>;
			};

			endpoint@2 {
				reg = <0x2>;
				remote-endpoint = <0x8a>;
				phandle = <0x93>;
			};

			endpoint@3 {
				reg = <0x3>;
				remote-endpoint = <0x8b>;
				phandle = <0x99>;
			};

			endpoint@4 {
				reg = <0x4>;
				remote-endpoint = <0x8c>;
				phandle = <0x94>;
			};
		};
	};

	iommu@ff930300 {
		compatible = "rockchip,iommu";
		reg = <0x0 0xff930300 0x0 0x100>;
		interrupts = <0x0 0xf 0x4>;
		interrupt-names = "vopb_mmu";
		clocks = <0x7 0xc5 0x7 0x1d1>;
		clock-names = "aclk", "hclk";
		power-domains = <0x7f 0x9>;
		#iommu-cells = <0x0>;
		status = "okay";
		phandle = <0x87>;
	};

	vop@ff940000 {
		compatible = "rockchip,rk3288-vop-lit";
		rockchip,grf = <0x53>;
		reg = <0x0 0xff940000 0x0 0x19c 0x0 0xff941000 0x0 0x1000>;
		reg-names = "regs", "gamma_lut";
		interrupts = <0x0 0x10 0x4>;
		clocks = <0x7 0xc6 0x7 0xbf 0x7 0x1d2>;
		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
		power-domains = <0x7f 0x9>;
		resets = <0x7 0xb0 0x7 0xb1 0x7 0xb2>;
		reset-names = "axi", "ahb", "dclk";
		iommus = <0x8d>;
		status = "okay";

		port {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x10>;

			endpoint@0 {
				reg = <0x0>;
				remote-endpoint = <0x8e>;
				phandle = <0x9d>;
			};

			endpoint@1 {
				reg = <0x1>;
				remote-endpoint = <0x8f>;
				phandle = <0x12>;
			};

			endpoint@2 {
				reg = <0x2>;
				remote-endpoint = <0x90>;
				phandle = <0x13>;
			};

			endpoint@3 {
				reg = <0x3>;
				remote-endpoint = <0x91>;
				phandle = <0x14>;
			};

			endpoint@4 {
				reg = <0x4>;
				remote-endpoint = <0x92>;
				phandle = <0x95>;
			};
		};
	};

	iommu@ff940300 {
		compatible = "rockchip,iommu";
		reg = <0x0 0xff940300 0x0 0x100>;
		interrupts = <0x0 0x10 0x4>;
		interrupt-names = "vopl_mmu";
		clocks = <0x7 0xc6 0x7 0x1d2>;
		clock-names = "aclk", "hclk";
		power-domains = <0x7f 0x9>;
		#iommu-cells = <0x0>;
		status = "okay";
		phandle = <0x8d>;
	};

	cif@ff950000 {
		compatible = "rockchip,cif";
		reg = <0x0 0xff950000 0x0 0x400>;
		interrupts = <0x0 0xd 0x4>;
		clocks = <0x7 0xcc 0x7 0x1d9 0x7 0x175 0x7 0x7f>;
		clock-names = "aclk_cif0", "hclk_cif0", "cif0_in", "cif0_out";
		resets = <0x7 0x68>;
		reset-names = "rst_cif";
		pinctrl-names = "cif_pin_all";
		pinctrl-0 = <0x81 0x82 0x84>;
		rockchip,grf = <0x53>;
		rockchip,cru = <0x7>;
		power-domains = <0x7f 0x9>;
		status = "disabled";
	};

	dsi@ff960000 {
		compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
		reg = <0x0 0xff960000 0x0 0x4000>;
		interrupts = <0x0 0x13 0x4>;
		clocks = <0x7 0x7e 0x7 0x164>;
		clock-names = "ref", "pclk";
		resets = <0x7 0x73>;
		reset-names = "apb";
		power-domains = <0x7f 0x9>;
		rockchip,grf = <0x53>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";

		ports {
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			port {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				endpoint@0 {
					reg = <0x0>;
					remote-endpoint = <0x93>;
					status = "disabled";
					phandle = <0x8a>;
				};

				endpoint@1 {
					reg = <0x1>;
					remote-endpoint = <0x13>;
					phandle = <0x90>;
				};
			};
		};
	};

	dsi@ff964000 {
		compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
		reg = <0x0 0xff964000 0x0 0x4000>;
		interrupts = <0x0 0x14 0x4>;
		clocks = <0x7 0x7e 0x7 0x165>;
		clock-names = "ref", "pclk";
		resets = <0x7 0x74>;
		reset-names = "apb";
		power-domains = <0x7f 0x9>;
		rockchip,grf = <0x53>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";

		ports {
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			port {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				endpoint@0 {
					reg = <0x0>;
					remote-endpoint = <0x94>;
					phandle = <0x8c>;
				};

				endpoint@1 {
					reg = <0x1>;
					remote-endpoint = <0x95>;
					phandle = <0x92>;
				};
			};
		};
	};

	mipi-phy-tx1rx1@ff968000 {
		compatible = "rockchip,rk3288-mipi-dphy";
		reg = <0x0 0xff968000 0x0 0x4000>;
		rockchip,grf = <0x53>;
		clocks = <0x7 0x7e 0x7 0x166>;
		clock-names = "dphy-ref", "pclk";
		status = "disabled";
	};

	dp@ff970000 {
		compatible = "rockchip,rk3288-dp";
		reg = <0x0 0xff970000 0x0 0x4000>;
		interrupts = <0x0 0x62 0x4>;
		clocks = <0x7 0x69 0x7 0x163>;
		clock-names = "dp", "pclk";
		power-domains = <0x7f 0x9>;
		phys = <0x96>;
		phy-names = "dp";
		resets = <0x7 0x6f>;
		reset-names = "dp";
		rockchip,grf = <0x53>;
		status = "disabled";
		force-hpd;

		ports {
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			port@0 {
				reg = <0x0>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				endpoint@0 {
					reg = <0x0>;
					remote-endpoint = <0x97>;
					status = "disabled";
					phandle = <0x89>;
				};

				endpoint@1 {
					reg = <0x1>;
					remote-endpoint = <0x12>;
					status = "okay";
					phandle = <0x8f>;
				};
			};

			port@1 {
				reg = <0x1>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				endpoint {
					reg = <0x0>;
					remote-endpoint = <0x98>;
					phandle = <0xc6>;
				};
			};
		};
	};

	lvds@ff96c000 {
		compatible = "rockchip,rk3288-lvds";
		reg = <0x0 0xff96c000 0x0 0x4000>;
		clocks = <0x7 0x167>;
		clock-names = "pclk_lvds";
		power-domains = <0x7f 0x9>;
		rockchip,grf = <0x53>;
		status = "disabled";

		ports {
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			port@0 {
				reg = <0x0>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				endpoint@0 {
					reg = <0x0>;
					remote-endpoint = <0x99>;
					status = "disabled";
					phandle = <0x8b>;
				};

				endpoint@1 {
					reg = <0x1>;
					remote-endpoint = <0x14>;
					status = "disabled";
					phandle = <0x91>;
				};
			};

			port@1 {
				reg = <0x1>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				endpoint@0 {
					reg = <0x0>;
					remote-endpoint = <0x9a>;
					phandle = <0xc9>;
				};
			};
		};
	};

	hdmi@ff980000 {
		compatible = "rockchip,rk3288-dw-hdmi";
		reg = <0x0 0xff980000 0x0 0x20000>;
		reg-io-width = <0x4>;
		rockchip,grf = <0x53>;
		interrupts = <0x0 0x67 0x4>;
		clocks = <0x7 0x168 0x7 0x6d>;
		clock-names = "iahb", "isfr";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <0x9b>;
		pinctrl-1 = <0x9c>;
		power-domains = <0x7f 0x9>;
		status = "disabled";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		#sound-dai-cells = <0x0>;
		rockchip,phy-table = <0x46cf710 0x8009 0x4 0x251 0x9d5b340 0x8009 0x4 0x251 0x11b3dc40 0x8039 0x4 0x40 0x2367b880 0x8039 0x0 0x40>;
		phandle = <0xba>;

		ports {

			port {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				endpoint@0 {
					reg = <0x0>;
					remote-endpoint = <0x15>;
					status = "okay";
					phandle = <0x88>;
				};

				endpoint@1 {
					reg = <0x1>;
					remote-endpoint = <0x9d>;
					status = "disabled";
					phandle = <0x8e>;
				};
			};
		};
	};

	video-codec@ff9a0000 {
		compatible = "rockchip,rk3288-vpu";
		reg = <0x0 0xff9a0000 0x0 0x800>;
		interrupts = <0x0 0x9 0x4 0x0 0xa 0x4>;
		interrupt-names = "vepu", "vdpu";
		clocks = <0x7 0xd0 0x7 0x1dc>;
		clock-names = "aclk", "hclk";
		power-domains = <0x7f 0xc>;
		iommus = <0x9e>;
		assigned-clocks = <0x7 0xd0>;
		assigned-clock-rates = <0x17d78400>;
		status = "disabled";
	};

	vpu-service@ff9a0000 {
		compatible = "rockchip,vpu_service";
		reg = <0x0 0xff9a0000 0x0 0x800>;
		interrupts = <0x0 0x9 0x4 0x0 0xa 0x4>;
		interrupt-names = "irq_enc", "irq_dec";
		clocks = <0x7 0xd0 0x7 0x1dc>;
		clock-names = "aclk_vcodec", "hclk_vcodec";
		power-domains = <0x7f 0xc>;
		rockchip,grf = <0x53>;
		resets = <0x7 0x70 0x7 0x71>;
		reset-names = "video_a", "video_h";
		iommus = <0x9e>;
		iommu_enabled = <0x1>;
		status = "okay";
		allocator = <0x1>;
	};

	iommu@ff9a0800 {
		compatible = "rockchip,iommu";
		reg = <0x0 0xff9a0800 0x0 0x100>;
		interrupts = <0x0 0xb 0x4>;
		interrupt-names = "vpu_mmu";
		clocks = <0x7 0xd0 0x7 0x1dc>;
		clock-names = "aclk", "hclk";
		power-domains = <0x7f 0xc>;
		#iommu-cells = <0x0>;
		phandle = <0x9e>;
	};

	hevc-service@ff9c0000 {
		compatible = "rockchip,hevc_service";
		reg = <0x0 0xff9c0000 0x0 0x400>;
		interrupts = <0x0 0xc 0x4>;
		interrupt-names = "irq_dec";
		clocks = <0x7 0xcf 0x7 0x1db 0x7 0x70 0x7 0x6f>;
		clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core", "clk_cabac";
		assigned-clocks = <0x7 0xcf 0x7 0x1db 0x7 0x70 0x7 0x6f>;
		assigned-clock-rates = <0x17d78400 0x5f5e100 0x11e1a300 0x11e1a300>;
		resets = <0x7 0x9a>;
		reset-names = "video";
		power-domains = <0x7f 0xb>;
		rockchip,grf = <0x53>;
		iommus = <0x9f>;
		iommu_enabled = <0x1>;
		status = "okay";
		allocator = <0x1>;
	};

	iommu@ff9c0440 {
		compatible = "rockchip,iommu";
		reg = <0x0 0xff9c0440 0x0 0x40 0x0 0xff9c0480 0x0 0x40>;
		interrupts = <0x0 0x6f 0x4>;
		interrupt-names = "hevc_mmu";
		clocks = <0x7 0xcf 0x7 0x1db 0x7 0x70 0x7 0x6f>;
		clock-names = "aclk", "hclk", "clk_core", "clk_cabac";
		power-domains = <0x7f 0xb>;
		#iommu-cells = <0x0>;
		phandle = <0x9f>;
	};

	gpu@ffa30000 {
		compatible = "arm,malit764", "arm,malit76x", "arm,malit7xx", "arm,mali-midgard";
		reg = <0x0 0xffa30000 0x0 0x10000>;
		interrupts = <0x0 0x6 0x4 0x0 0x7 0x4 0x0 0x8 0x4>;
		interrupt-names = "JOB", "MMU", "GPU";
		clocks = <0x7 0xc0>;
		clock-names = "clk_mali";
		operating-points-v2 = <0xa0>;
		#cooling-cells = <0x2>;
		power-domains = <0x7f 0xd>;
		status = "okay";
		upthreshold = <0x4b>;
		downdifferential = <0xa>;
		mali-supply = <0xa1>;
		phandle = <0x51>;

		power_model {
			compatible = "arm,mali-simple-power-model";
			static-coefficient = <0x64578>;
			dynamic-coefficient = <0x2dd>;
			ts = <0x7d00 0x125c 0xffffffb0 0x2>;
			thermal-zone = "gpu-thermal";
		};
	};

	opp-table1 {
		compatible = "operating-points-v2";
		phandle = <0xa0>;

		opp-200000000 {
			opp-hz = <0x0 0xbebc200>;
			opp-microvolt = <0xe7ef0>;
		};

		opp-300000000 {
			opp-hz = <0x0 0x11e1a300>;
			opp-microvolt = <0xf4240>;
		};

		opp-400000000 {
			opp-hz = <0x0 0x17d78400>;
			opp-microvolt = <0x10c8e0>;
		};

		opp-500000000 {
			opp-hz = <0x0 0x1dcd6500>;
			opp-microvolt = <0x124f80>;
		};
	};

	syscon@ffac0000 {
		compatible = "rockchip,rk3288-noc", "syscon";
		reg = <0x0 0xffac0000 0x0 0x2000>;
	};

	nocp-core@ffac0400 {
		compatible = "rockchip,rk3288-nocp";
		reg = <0x0 0xffac0400 0x0 0x400>;
	};

	nocp-gpu@ffac0800 {
		compatible = "rockchip,rk3288-nocp";
		reg = <0x0 0xffac0800 0x0 0x400>;
	};

	nocp-peri@ffac0c00 {
		compatible = "rockchip,rk3288-nocp";
		reg = <0x0 0xffac0c00 0x0 0x400>;
	};

	nocp-vpu@ffac1000 {
		compatible = "rockchip,rk3288-nocp";
		reg = <0x0 0xffac1000 0x0 0x400>;
	};

	nocp-vio0@ffac1400 {
		compatible = "rockchip,rk3288-nocp";
		reg = <0x0 0xffac1400 0x0 0x400>;
	};

	nocp-vio1@ffac1800 {
		compatible = "rockchip,rk3288-nocp";
		reg = <0x0 0xffac1800 0x0 0x400>;
	};

	nocp-vio2@ffac1c00 {
		compatible = "rockchip,rk3288-nocp";
		reg = <0x0 0xffac1c00 0x0 0x400>;
	};

	efuse@ffb40000 {
		compatible = "rockchip,rk3288-secure-efuse";
		reg = <0x0 0xffb40000 0x0 0x20>;
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		clocks = <0x7 0x171>;
		clock-names = "pclk_efuse";

		special-function@5 {
			reg = <0x5 0x1>;
			bits = <0x4 0x4>;
			phandle = <0xb>;
		};

		process-version@6 {
			reg = <0x6 0x1>;
			bits = <0x0 0x4>;
			phandle = <0xd>;
		};

		id@7 {
			reg = <0x7 0x10>;
			phandle = <0xab>;
		};

		cpu-leakage@17 {
			reg = <0x17 0x1>;
			phandle = <0xa>;
		};

		performance@1c {
			reg = <0x1c 0x1>;
			bits = <0x4 0x3>;
			phandle = <0xe>;
		};

		performance@1d {
			reg = <0x1d 0x1>;
			bits = <0x4 0x3>;
			phandle = <0xc>;
		};
	};

	interrupt-controller@ffc01000 {
		compatible = "arm,gic-400";
		interrupt-controller;
		#interrupt-cells = <0x3>;
		#address-cells = <0x0>;
		reg = <0x0 0xffc01000 0x0 0x1000 0x0 0xffc02000 0x0 0x2000 0x0 0xffc04000 0x0 0x2000 0x0 0xffc06000 0x0 0x2000>;
		interrupts = <0x1 0x9 0xf04>;
		phandle = <0x1>;
	};

	pinctrl {
		compatible = "rockchip,rk3288-pinctrl";
		rockchip,grf = <0x53>;
		rockchip,pmu = <0x6>;
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;

		gpio0@ff750000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xff750000 0x0 0x100>;
			interrupts = <0x0 0x51 0x4>;
			clocks = <0x7 0x140>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x35>;
		};

		gpio1@ff780000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xff780000 0x0 0x100>;
			interrupts = <0x0 0x52 0x4>;
			clocks = <0x7 0x141>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0xb1>;
		};

		gpio2@ff790000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xff790000 0x0 0x100>;
			interrupts = <0x0 0x53 0x4>;
			clocks = <0x7 0x142>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0xcc>;
		};

		gpio3@ff7a0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xff7a0000 0x0 0x100>;
			interrupts = <0x0 0x54 0x4>;
			clocks = <0x7 0x143>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x5d>;
		};

		gpio4@ff7b0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xff7b0000 0x0 0x100>;
			interrupts = <0x0 0x55 0x4>;
			clocks = <0x7 0x144>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x55>;
		};

		gpio5@ff7c0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xff7c0000 0x0 0x100>;
			interrupts = <0x0 0x56 0x4>;
			clocks = <0x7 0x145>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x4e>;
		};

		gpio6@ff7d0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xff7d0000 0x0 0x100>;
			interrupts = <0x0 0x57 0x4>;
			clocks = <0x7 0x146>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x5e>;
		};

		gpio7@ff7e0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xff7e0000 0x0 0x100>;
			interrupts = <0x0 0x58 0x4>;
			clocks = <0x7 0x147>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0xcb>;
		};

		gpio8@ff7f0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xff7f0000 0x0 0x100>;
			interrupts = <0x0 0x59 0x4>;
			clocks = <0x7 0x148>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
		};

		hdmi {

			hdmi-gpio {
				rockchip,pins = <0x7 0x13 0x0 0xa2 0x7 0x14 0x0 0xa2>;
				phandle = <0x9c>;
			};

			hdmi-ddc {
				rockchip,pins = <0x7 0x13 0x2 0xa2 0x7 0x14 0x2 0xa2>;
				phandle = <0x9b>;
			};
		};

		pcfg-pull-up {
			bias-pull-up;
			phandle = <0xa3>;
		};

		pcfg-pull-down {
			bias-pull-down;
			phandle = <0xa4>;
		};

		pcfg-pull-none {
			bias-disable;
			phandle = <0xa2>;
		};

		pcfg-pull-none-12ma {
			bias-disable;
			drive-strength = <0xc>;
			phandle = <0xa8>;
		};

		sleep {

			global-pwroff {
				rockchip,pins = <0x0 0x0 0x1 0xa2>;
				phandle = <0x37>;
			};

			ddrio-pwroff {
				rockchip,pins = <0x0 0x1 0x1 0xa2>;
			};

			ddr0-retention {
				rockchip,pins = <0x0 0x2 0x1 0xa3>;
			};

			ddr1-retention {
				rockchip,pins = <0x0 0x3 0x1 0xa3>;
			};
		};

		edp {

			edp-hpd {
				rockchip,pins = <0x7 0xb 0x2 0xa4>;
			};
		};

		i2c0 {

			i2c0-xfer {
				rockchip,pins = <0x0 0xf 0x1 0xa2 0x0 0x10 0x1 0xa2>;
				phandle = <0x34>;
			};
		};

		i2c1 {

			i2c1-xfer {
				rockchip,pins = <0x8 0x4 0x1 0xa2 0x8 0x5 0x1 0xa2>;
				phandle = <0x3a>;
			};
		};

		i2c2 {

			i2c2-xfer {
				rockchip,pins = <0x6 0x9 0x1 0xa2 0x6 0xa 0x1 0xa2>;
				phandle = <0x5c>;
			};
		};

		i2c3 {

			i2c3-xfer {
				rockchip,pins = <0x2 0x10 0x1 0xa2 0x2 0x11 0x1 0xa2>;
				phandle = <0x3b>;
			};
		};

		i2c4 {

			i2c4-xfer {
				rockchip,pins = <0x7 0x11 0x1 0xa2 0x7 0x12 0x1 0xa2>;
				phandle = <0x3c>;
			};
		};

		i2c5 {

			i2c5-xfer {
				rockchip,pins = <0x7 0x13 0x1 0xa2 0x7 0x14 0x1 0xa2>;
				phandle = <0x3d>;
			};
		};

		i2s0 {

			i2s0-bus {
				rockchip,pins = <0x6 0x0 0x1 0xa2 0x6 0x1 0x1 0xa2 0x6 0x2 0x1 0xa2 0x6 0x3 0x1 0xa2 0x6 0x4 0x1 0xa2>;
				phandle = <0x7d>;
			};

			i2s0-mclk {
				rockchip,pins = <0x6 0x8 0x1 0xa2>;
				phandle = <0x5f>;
			};
		};

		lcdc {

			lcdc-ctl {
				rockchip,pins = <0x1 0x18 0x1 0xa2 0x1 0x19 0x1 0xa2 0x1 0x1a 0x1 0xa2 0x1 0x1b 0x1 0xa2>;
			};
		};

		sdmmc {

			sdmmc-clk {
				rockchip,pins = <0x6 0x14 0x1 0xa5>;
				phandle = <0x16>;
			};

			sdmmc-cmd {
				rockchip,pins = <0x6 0x15 0x1 0xa6>;
				phandle = <0x17>;
			};

			sdmmc-cd {
				rockchip,pins = <0x6 0x16 0x1 0xa3>;
				phandle = <0x18>;
			};

			sdmmc-bus1 {
				rockchip,pins = <0x6 0x10 0x1 0xa3>;
			};

			sdmmc-bus4 {
				rockchip,pins = <0x6 0x10 0x1 0xa6 0x6 0x11 0x1 0xa6 0x6 0x12 0x1 0xa6 0x6 0x13 0x1 0xa6>;
				phandle = <0x19>;
			};
		};

		sdio0 {

			sdio0-bus1 {
				rockchip,pins = <0x4 0x14 0x1 0xa7>;
			};

			sdio0-bus4 {
				rockchip,pins = <0x4 0x14 0x1 0xa7 0x4 0x15 0x1 0xa7 0x4 0x16 0x1 0xa7 0x4 0x17 0x1 0xa7>;
				phandle = <0x1d>;
			};

			sdio0-cmd {
				rockchip,pins = <0x4 0x18 0x1 0xa7>;
				phandle = <0x1e>;
			};

			sdio0-clk {
				rockchip,pins = <0x4 0x19 0x1 0xa8>;
				phandle = <0x1f>;
			};

			sdio0-cd {
				rockchip,pins = <0x4 0x1a 0x1 0xa3>;
			};

			sdio0-wp {
				rockchip,pins = <0x4 0x1b 0x1 0xa3>;
			};

			sdio0-pwr {
				rockchip,pins = <0x4 0x1c 0x1 0xa3>;
			};

			sdio0-bkpwr {
				rockchip,pins = <0x4 0x1d 0x1 0xa3>;
			};

			sdio0-int {
				rockchip,pins = <0x4 0x1e 0x1 0xa7>;
				phandle = <0x20>;
			};
		};

		sdio1 {

			sdio1-bus1 {
				rockchip,pins = <0x3 0x18 0x4 0xa3>;
			};

			sdio1-bus4 {
				rockchip,pins = <0x3 0x18 0x4 0xa3 0x3 0x19 0x4 0xa3 0x3 0x1a 0x4 0xa3 0x3 0x1b 0x4 0xa3>;
			};

			sdio1-cd {
				rockchip,pins = <0x3 0x1c 0x4 0xa3>;
			};

			sdio1-wp {
				rockchip,pins = <0x3 0x1d 0x4 0xa3>;
			};

			sdio1-bkpwr {
				rockchip,pins = <0x3 0x1e 0x4 0xa3>;
			};

			sdio1-int {
				rockchip,pins = <0x3 0x1f 0x4 0xa3>;
			};

			sdio1-cmd {
				rockchip,pins = <0x4 0x6 0x4 0xa3>;
			};

			sdio1-clk {
				rockchip,pins = <0x4 0x7 0x4 0xa2>;
			};

			sdio1-pwr {
				rockchip,pins = <0x4 0x9 0x4 0xa3>;
			};
		};

		emmc {

			emmc-clk {
				rockchip,pins = <0x3 0x12 0x2 0xa8>;
				phandle = <0x21>;
			};

			emmc-cmd {
				rockchip,pins = <0x3 0x10 0x2 0xa3>;
				phandle = <0x22>;
			};

			emmc-pwr {
				rockchip,pins = <0x3 0x9 0x2 0xa3>;
				phandle = <0x23>;
			};

			emmc-bus1 {
				rockchip,pins = <0x3 0x0 0x2 0xa3>;
			};

			emmc-bus4 {
				rockchip,pins = <0x3 0x0 0x2 0xa3 0x3 0x1 0x2 0xa3 0x3 0x2 0x2 0xa3 0x3 0x3 0x2 0xa3>;
			};

			emmc-bus8 {
				rockchip,pins = <0x3 0x0 0x2 0xa3 0x3 0x1 0x2 0xa3 0x3 0x2 0x2 0xa3 0x3 0x3 0x2 0xa3 0x3 0x4 0x2 0xa3 0x3 0x5 0x2 0xa3 0x3 0x6 0x2 0xa3 0x3 0x7 0x2 0xa3>;
				phandle = <0x24>;
			};
		};

		spi0 {

			spi0-clk {
				rockchip,pins = <0x5 0xc 0x1 0xa3>;
				phandle = <0x27>;
			};

			spi0-cs0 {
				rockchip,pins = <0x5 0xd 0x1 0xa3>;
				phandle = <0x2a>;
			};

			spi0-tx {
				rockchip,pins = <0x5 0xe 0x1 0xa3>;
				phandle = <0x28>;
			};

			spi0-rx {
				rockchip,pins = <0x5 0xf 0x1 0xa3>;
				phandle = <0x29>;
			};

			spi0-cs1 {
				rockchip,pins = <0x5 0x10 0x1 0xa3>;
			};
		};

		spi1 {

			spi1-clk {
				rockchip,pins = <0x7 0xc 0x2 0xa3>;
				phandle = <0x2b>;
			};

			spi1-cs0 {
				rockchip,pins = <0x7 0xd 0x2 0xa3>;
				phandle = <0x2e>;
			};

			spi1-rx {
				rockchip,pins = <0x7 0xe 0x2 0xa3>;
				phandle = <0x2d>;
			};

			spi1-tx {
				rockchip,pins = <0x7 0xf 0x2 0xa3>;
				phandle = <0x2c>;
			};
		};

		spi2 {

			spi2-cs1 {
				rockchip,pins = <0x8 0x3 0x1 0xa3>;
				phandle = <0x33>;
			};

			spi2-clk {
				rockchip,pins = <0x8 0x6 0x1 0xa9>;
				phandle = <0x2f>;
			};

			spi2-cs0 {
				rockchip,pins = <0x8 0x7 0x1 0xaa>;
				phandle = <0x32>;
			};

			spi2-rx {
				rockchip,pins = <0x8 0x8 0x1 0xa9>;
				phandle = <0x31>;
			};

			spi2-tx {
				rockchip,pins = <0x8 0x9 0x1 0xa9>;
				phandle = <0x30>;
			};
		};

		uart0 {

			uart0-xfer {
				rockchip,pins = <0x4 0x10 0x1 0xa3 0x4 0x11 0x1 0xa2>;
				phandle = <0x3e>;
			};

			uart0-cts {
				rockchip,pins = <0x4 0x12 0x1 0xa3>;
				phandle = <0x3f>;
			};

			uart0-rts {
				rockchip,pins = <0x4 0x13 0x1 0xa2>;
				phandle = <0xc1>;
			};
		};

		uart1 {

			uart1-xfer {
				rockchip,pins = <0x5 0x8 0x1 0xa3 0x5 0x9 0x1 0xa2>;
				phandle = <0x40>;
			};

			uart1-cts {
				rockchip,pins = <0x5 0xa 0x1 0xa3>;
				phandle = <0x41>;
			};

			uart1-rts {
				rockchip,pins = <0x5 0xb 0x1 0xa2>;
				phandle = <0x42>;
			};
		};

		uart2 {

			uart2-xfer {
				rockchip,pins = <0x7 0x16 0x1 0xa3 0x7 0x17 0x1 0xa2>;
				phandle = <0x44>;
			};
		};

		uart3 {

			uart3-xfer {
				rockchip,pins = <0x7 0x7 0x1 0xa3 0x7 0x8 0x1 0xa2>;
				phandle = <0x45>;
			};

			uart3-cts {
				rockchip,pins = <0x7 0x9 0x1 0xa3>;
				phandle = <0x46>;
			};

			uart3-rts {
				rockchip,pins = <0x7 0xa 0x1 0xa2>;
				phandle = <0x47>;
			};
		};

		uart4 {

			uart4-xfer {
				rockchip,pins = <0x5 0xf 0x3 0xa3 0x5 0xe 0x3 0xa2>;
				phandle = <0x49>;
			};

			uart4-cts {
				rockchip,pins = <0x5 0xc 0x3 0xa3>;
				phandle = <0x4a>;
			};

			uart4-rts {
				rockchip,pins = <0x5 0xd 0x3 0xa2>;
				phandle = <0x4b>;
			};
		};

		tsadc {

			otp-gpio {
				rockchip,pins = <0x0 0xa 0x0 0xa2>;
				phandle = <0x52>;
			};

			otp-out {
				rockchip,pins = <0x0 0xa 0x1 0xa2>;
			};
		};

		pwm0 {

			pwm0-pin {
				rockchip,pins = <0x7 0x0 0x1 0xa2>;
				phandle = <0x65>;
			};

			pwm0-pin-pull-down {
				rockchip,pins = <0x7 0x0 0x1 0xa4>;
			};
		};

		pwm1 {

			pwm1-pin {
				rockchip,pins = <0x7 0x1 0x1 0xa2>;
				phandle = <0x66>;
			};

			pwm1-pin-pull-down {
				rockchip,pins = <0x7 0x1 0x1 0xa4>;
			};
		};

		pwm2 {

			pwm2-pin {
				rockchip,pins = <0x7 0x16 0x3 0xa2>;
				phandle = <0x67>;
			};

			pwm2-pin-pull-down {
				rockchip,pins = <0x7 0x16 0x3 0xa4>;
			};
		};

		pwm3 {

			pwm3-pin {
				rockchip,pins = <0x7 0x17 0x3 0xa2>;
				phandle = <0x68>;
			};

			pwm3-pin-pull-down {
				rockchip,pins = <0x7 0x17 0x3 0xa4>;
			};
		};

		gmac {

			rgmii-pins {
				rockchip,pins = <0x3 0x1e 0x3 0xa8 0x3 0x1f 0x3 0xa8 0x3 0x1a 0x3 0xa8 0x3 0x1b 0x3 0xa8 0x3 0x1c 0x3 0xa8 0x3 0x1d 0x3 0xa8 0x3 0x18 0x3 0xa8 0x3 0x19 0x3 0xa8 0x4 0x0 0x3 0xa8 0x4 0x5 0x3 0xa8 0x4 0x6 0x3 0xa8 0x4 0x8 0x3 0xa8 0x4 0x9 0x3 0xa8 0x4 0x4 0x3 0xa8 0x4 0x1 0x3 0xa8 0x4 0x3 0x3 0xa8>;
				phandle = <0x57>;
			};

			rmii-pins {
				rockchip,pins = <0x3 0x1e 0x3 0xa2 0x3 0x1f 0x3 0xa2 0x3 0x1c 0x3 0xa2 0x3 0x1d 0x3 0xa2 0x4 0x0 0x3 0xa2 0x4 0x5 0x3 0xa2 0x4 0x4 0x3 0xa2 0x4 0x1 0x3 0xa2 0x4 0x2 0x3 0xa2 0x4 0x3 0x3 0xa2>;
			};
		};

		spdif {

			spdif-tx {
				rockchip,pins = <0x6 0xb 0x1 0xa2>;
				phandle = <0x7c>;
			};
		};

		cif {

			cif-dvp-d2d9 {
				rockchip,pins = <0x2 0x0 0x1 0xa2 0x2 0x1 0x1 0xa2 0x2 0x2 0x1 0xa2 0x2 0x3 0x1 0xa2 0x2 0x4 0x1 0xa2 0x2 0x5 0x1 0xa2 0x2 0x6 0x1 0xa2 0x2 0x7 0x1 0xa2 0x2 0x8 0x1 0xa2 0x2 0x9 0x1 0xa2 0x2 0xb 0x1 0xa2>;
			};
		};

		isp_pin {

			isp-mipi {
				rockchip,pins = <0x2 0xb 0x1 0xa2>;
				phandle = <0x81>;
			};

			isp-d2d9 {
				rockchip,pins = <0x2 0x0 0x1 0xa2 0x2 0x1 0x1 0xa2 0x2 0x2 0x1 0xa2 0x2 0x3 0x1 0xa2 0x2 0x4 0x1 0xa2 0x2 0x5 0x1 0xa2 0x2 0x6 0x1 0xa2 0x2 0x7 0x1 0xa2 0x2 0x8 0x1 0xa2 0x2 0x9 0x1 0xa2 0x2 0xa 0x1 0xa2 0x2 0xb 0x1 0xa2>;
				phandle = <0x82>;
			};

			isp-d0d1 {
				rockchip,pins = <0x2 0xc 0x1 0xa2 0x2 0xd 0x1 0xa2>;
				phandle = <0x83>;
			};

			isp-d10d11 {
				rockchip,pins = <0x2 0xe 0x1 0xa2 0x2 0xf 0x1 0xa2>;
				phandle = <0x84>;
			};

			isp-d0d7 {
				rockchip,pins = <0x2 0xc 0x1 0xa2 0x2 0xd 0x1 0xa2 0x2 0x0 0x1 0xa2 0x2 0x1 0x1 0xa2 0x2 0x2 0x1 0xa2 0x2 0x3 0x1 0xa2 0x2 0x4 0x1 0xa2 0x2 0x5 0x1 0xa2>;
				phandle = <0x85>;
			};

			isp-shutter {
				rockchip,pins = <0x7 0xc 0x2 0xa2 0x7 0xf 0x2 0xa2>;
			};

			isp-flash-trigger {
				rockchip,pins = <0x7 0xd 0x2 0xa2>;
			};

			isp-prelight {
				rockchip,pins = <0x7 0xe 0x2 0xa2>;
				phandle = <0x86>;
			};

			isp-flash-trigger-as-gpio {
				rockchip,pins = <0x7 0xd 0x2 0xa2>;
			};
		};

		buttons {

			pwrbtn {
				rockchip,pins = <0x0 0x5 0x0 0xa3>;
				phandle = <0xb5>;
			};
		};

		pcfg-pull-up-12ma {
			bias-pull-up;
			drive-strength = <0xc>;
			phandle = <0xa7>;
		};

		pcfg-pull-none-drv-8ma {
			bias-disable;
			drive-strength = <0x8>;
			phandle = <0xa5>;
		};

		pcfg-pull-up-drv-8ma {
			bias-pull-up;
			drive-strength = <0x8>;
			phandle = <0xa6>;
		};

		pcfg-pull-up-drv-2ma {
			bias-pull-up;
			drive-strength = <0x2>;
			phandle = <0xaa>;
		};

		pcfg-pull-down-drv-2ma {
			bias-pull-down;
			drive-strength = <0x2>;
			phandle = <0xa9>;
		};

		codec {

			codec-avdd {
				rockchip,pins = <0x3 0xa 0x0 0xa3>;
				phandle = <0x60>;
			};

			codec-micvdd {
				rockchip,pins = <0x3 0xb 0x0 0xa4>;
				phandle = <0x61>;
			};

			codec-spkvdd {
				rockchip,pins = <0x3 0xc 0x0 0xa4>;
				phandle = <0x62>;
			};

			amp-shutdown {
				rockchip,pins = <0x3 0xd 0x0 0xa3>;
				phandle = <0x63>;
			};

			amp-mute {
				rockchip,pins = <0x6 0x5 0x0 0xa4>;
				phandle = <0x64>;
			};
		};

		pmic {

			pmic-int {
				rockchip,pins = <0x0 0x4 0x0 0xa3>;
				phandle = <0x36>;
			};

			pmic-pwr {
				rockchip,pins = <0x0 0x5 0x0 0xa2>;
				phandle = <0xbd>;
			};

			pmic-rst {
				rockchip,pins = <0x0 0xa 0x0 0xa2>;
			};
		};

		usb {

			host-vbus-drv {
				rockchip,pins = <0x0 0xe 0x0 0xa2>;
				phandle = <0xb6>;
			};

			otg-vbus-drv {
				rockchip,pins = <0x0 0xc 0x0 0xa2>;
				phandle = <0xb7>;
			};
		};

		eth-phy {

			eth-phy-pwr {
				rockchip,pins = <0x4 0x2 0x0 0xa2>;
				phandle = <0xca>;
			};

			eth-phy-rst {
				rockchip,pins = <0x4 0x7 0x0 0xa2>;
				phandle = <0x58>;
			};
		};

		wireless-bluetooth {

			uart0-rts-gpio {
				rockchip,pins = <0x4 0x13 0x0 0xa2>;
				phandle = <0xc3>;
			};

			bt-pwr-h {
				rockchip,pins = <0x5 0x11 0x0 0xa2>;
				phandle = <0xc2>;
			};
		};

		lvds {

			vdd-lvds-pwr {
				rockchip,pins = <0x1 0x1a 0x0 0xa2>;
				phandle = <0xc4>;
			};

			bl-en {
				rockchip,pins = <0x1 0x1b 0x0 0xa2>;
				phandle = <0xb2>;
			};
		};

		sdio-pwrseq {

			wifi-enable-h {
				rockchip,pins = <0x5 0x12 0x0 0xa2>;
				phandle = <0xbf>;
			};

			wifi-pwr-h {
				rockchip,pins = <0x4 0x1c 0x0 0xa2>;
				phandle = <0xc0>;
			};
		};

		minipcie-pwrseq {

			pcie-pwren {
				rockchip,pins = <0x7 0x6 0x0 0xa2>;
				phandle = <0xcd>;
			};

			pcie-reset {
				rockchip,pins = <0x2 0x7 0x0 0xa2>;
				phandle = <0xce>;
			};
		};

		uart1_pin {

			uart1-rts-gpio {
				rockchip,pins = <0x3 0x13 0x0 0xa2>;
				phandle = <0x43>;
			};
		};

		uart3_pin {

			uart3-rts-gpio {
				rockchip,pins = <0x7 0xa 0x0 0xa2>;
				phandle = <0x48>;
			};
		};

		uart4_pin {

			uart4-rts-gpio {
				rockchip,pins = <0x5 0xd 0x0 0xa2>;
				phandle = <0x4d>;
			};

			uart4-sel-gpio {
				rockchip,pins = <0x5 0x10 0x0 0xa2>;
				phandle = <0x4c>;
			};
		};
	};

	rockchip-suspend {
		compatible = "rockchip,pm-rk3288";
		status = "disabled";
		rockchip,sleep-mode-config = <0x80207>;
		rockchip,wakeup-config = <0x8>;
		rockchip,pwm-regulator-config = <0x0>;
	};

	ddr_timing {
		compatible = "rockchip,ddr-timing";
		ddr3_speed_bin = <0x15>;
		pd_idle = <0x40>;
		sr_idle = <0x1>;
		auto_pd_dis_freq = <0x320>;
		auto_sr_dis_freq = <0x320>;
		ddr3_dll_dis_freq = <0x12c>;
		phy_dll_dis_freq = <0xfa>;
		ddr3_odt_dis_freq = <0x14d>;
		phy_ddr3_odt_dis_freq = <0x14d>;
		ddr3_drv = <0x28>;
		ddr3_odt = <0x78>;
		phy_ddr3_drv = <0x19>;
		phy_ddr3_odt = <0x2>;
		lpddr2_drv = <0x28>;
		phy_lpddr2_drv = <0x1b>;
		lpddr3_odt_dis_freq = <0x14d>;
		phy_lpddr3_odt_dis_freq = <0x14d>;
		lpddr3_drv = <0x28>;
		lpddr3_odt = <0xf0>;
		phy_lpddr3_drv = <0x1b>;
		phy_lpddr3_odt = <0x2>;
		phandle = <0xae>;
	};

	firmware {

		android {
			compatible = "android,firmware";
			status = "disabled";

			fstab {
				compatible = "android,fstab";

				system {
					compatible = "android,system";
					dev = "/dev/block/by-name/system";
					type = "ext4";
					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
					fsmgr_flags = "wait";
				};

				vendor {
					compatible = "android,vendor";
					dev = "/dev/block/by-name/vendor";
					type = "ext4";
					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
					fsmgr_flags = "wait";
				};
			};
		};
	};

	cpuinfo {
		compatible = "rockchip,cpuinfo";
		nvmem-cells = <0xab>;
		nvmem-cell-names = "id";
	};

	dfi {
		compatible = "rockchip,rk3288-dfi";
		rockchip,pmu = <0x6>;
		rockchip,grf = <0x53>;
		status = "okay";
		phandle = <0xac>;
	};

	dmc {
		compatible = "rockchip,rk3288-dmc";
		devfreq-events = <0xac>;
		clocks = <0x7 0x80 0x7 0x16d 0x7 0x16c 0x7 0x16f 0x7 0x16e>;
		clock-names = "dmc_clk", "pclk_phy0", "pclk_upctl0", "pclk_phy1", "pclk_upctl1";
		upthreshold = <0x37>;
		downdifferential = <0xa>;
		operating-points-v2 = <0xad>;
		vop-dclk-mode = <0x0>;
		min-cpu-freq = <0x927c0>;
		rockchip,ddr_timing = <0xae>;
		system-status-freq = <0x1 0x60ae0 0x8 0x60ae0 0x2 0x2ee00 0x20 0x493e0 0x10 0x60ae0 0x10000 0x80e80 0x2000 0x80e80 0x1000 0x60ae0 0xc00 0x60ae0 0x4000 0x60ae0>;
		auto-min-freq = <0x60ae0>;
		auto-freq-en = <0x0>;
		status = "okay";
		center-supply = <0xaf>;
	};

	opp_table2 {
		compatible = "operating-points-v2";
		phandle = <0xad>;

		opp-192000000 {
			opp-hz = <0x0 0xb71b000>;
			opp-microvolt = <0x118c30>;
		};

		opp-300000000 {
			opp-hz = <0x0 0x11e1a300>;
			opp-microvolt = <0x118c30>;
		};

		opp-396000000 {
			opp-hz = <0x0 0x179a7b00>;
			opp-microvolt = <0x118c30>;
		};

		opp-528000000 {
			opp-hz = <0x0 0x1f78a400>;
			opp-microvolt = <0x118c30>;
		};
	};

	ramoops {
		compatible = "ramoops";
		record-size = <0x0 0x20000>;
		console-size = <0x0 0x80000>;
		ftrace-size = <0x0 0x0>;
		pmsg-size = <0x0 0x50000>;
		memory-region = <0xb0>;
	};

	fiq-debugger {
		compatible = "rockchip,fiq-debugger";
		interrupts = <0x0 0x9b 0x4>;
		rockchip,serial-id = <0x2>;
		rockchip,wake-irq = <0x0>;
		rockchip,irq-mode-enable = <0x0>;
		rockchip,baudrate = <0x1c200>;
		pinctrl-names = "default";
		pinctrl-0 = <0x44>;
		status = "disabled";
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	backlight {
		compatible = "pwm-backlight";
		brightness-levels = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb1 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd1 0xd2 0xd3 0xd4 0xd5 0xd6 0xd7 0xd8 0xd9 0xda 0xdb 0xdc 0xdd 0xde 0xdf 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 0xe8 0xe9 0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa 0xfb 0xfc 0xfd 0xfe 0xff>;
		default-brightness-level = <0xc8>;
		enable-gpios = <0xb1 0x1b 0x0>;
		pinctrl-names = "default";
		pinctrl-0 = <0xb2>;
		pwms = <0xb3 0x0 0x61a8 0x0>;
		rockchip,pwm_id = <0x1>;
		phandle = <0xc8>;
	};

	rockchip-key {
		compatible = "rockchip,key";
		status = "disabled";
		io-channels = <0xb4 0x1>;

		vol-up-key {
			linux,code = <0x73>;
			label = "volume up";
			rockchip,adc_value = <0x1>;
		};

		vol-down-key {
			linux,code = <0x72>;
			label = "volume down";
			rockchip,adc_value = <0xaa>;
		};

		power-key {
			gpios = <0x35 0x5 0x1>;
			linux,code = <0x74>;
			pinctrl-names = "default";
			pinctrl-0 = <0xb5>;
			label = "power";
			gpio-key,wakeup;
		};

		menu-key {
			linux,code = <0x3b>;
			label = "menu";
			rockchip,adc_value = <0x163>;
		};

		home-key {
			linux,code = <0x66>;
			label = "home";
			rockchip,adc_value = <0x2ea>;
		};

		back-key {
			linux,code = <0x9e>;
			label = "back";
			rockchip,adc_value = <0x230>;
		};

		camera-key {
			linux,code = <0xd4>;
			label = "camera";
			rockchip,adc_value = <0x1c2>;
		};
	};

	dwc-control-usb@ff770284 {
		compatible = "rockchip,rk3288-dwc-control-usb";
		status = "okay";
		reg = <0x0 0xff770284 0x0 0x4 0x0 0xff770288 0x0 0x4 0x0 0xff7702cc 0x0 0x4 0x0 0xff7702d4 0x0 0x4 0x0 0xff770320 0x0 0x14 0x0 0xff770334 0x0 0x14 0x0 0xff770348 0x0 0x10 0x0 0xff770358 0x0 0x8 0x0 0xff770360 0x0 0x8>;
		reg-names = "GRF_SOC_STATUS1", "GRF_SOC_STATUS2", "GRF_SOC_STATUS19", "GRF_SOC_STATUS21", "GRF_UOC0_BASE", "GRF_UOC1_BASE", "GRF_UOC2_BASE", "GRF_UOC3_BASE", "GRF_UOC4_BASE";
		interrupts = <0x0 0x5d 0x4 0x0 0x5e 0x4 0x0 0x5f 0x4 0x0 0x60 0x4 0x0 0x61 0x4>;
		interrupt-names = "otg_id", "otg_bvalid", "otg_linestate", "host0_linestate", "host1_linestate";
		clocks = <0x7 0x1df>;
		clock-names = "hclk_usb_peri";
		otg_drv_gpio = <0x35 0xc 0x1>;
		rockchip,remote_wakeup;
		rockchip,usb_irq_wakeup;
		pinctrl-names = "default";
		pinctrl-0 = <0xb6 0xb7>;
		host_drv_gpio = <0x35 0xe 0x1>;

		usb_bc {
			compatible = "synopsys,phy";
			rk_usb,bvalid = <0x288 0xe 0x1>;
			rk_usb,iddig = <0x288 0x11 0x1>;
			rk_usb,dcdenb = <0x328 0xe 0x1>;
			rk_usb,vdatsrcenb = <0x328 0x7 0x1>;
			rk_usb,vdatdetenb = <0x328 0x6 0x1>;
			rk_usb,chrgsel = <0x328 0x5 0x1>;
			rk_usb,chgdet = <0x2cc 0x17 0x1>;
			rk_usb,fsvminus = <0x2cc 0x19 0x1>;
			rk_usb,fsvplus = <0x2cc 0x18 0x1>;
		};
	};

	nandc@ff400000 {
		compatible = "rockchip,rk-nandc";
		reg = <0x0 0xff400000 0x0 0x4000>;
		interrupts = <0x0 0x26 0x4>;
		nandc_id = <0x0>;
		clocks = <0x7 0x4b 0x7 0x1c5>;
		clock-names = "clk_nandc", "hclk_nandc";
		status = "disabled";
	};

	hdmi-analog-sound {
		status = "okay";
		compatible = "rockchip,rk3288-hdmi-analog", "rockchip,rk3368-hdmi-analog";
		rockchip,model = "rockchip,rt5660-codec";
		rockchip,cpu = <0xb8>;
		rockchip,codec = <0xb9 0xba>;
		rockchip,widgets = "Microphone", "Microphone Jack", "Headphone", "Headphone Jack";
		rockchip,routing = "IN1P", "Microphone Jack", "IN1N", "Microphone Jack", "Microphone Jack", "MICBIAS1", "Headphone Jack", "SPO", "Headphone Jack", "LOUTL", "Headphone Jack", "LOUTR";
	};

	display-timings {
		native-mode = <0xbb>;
		use-dts-screen = <0x0>;
		prmry-screen = <0xbc>;
		extend-screen = <0xbb>;
		phandle = <0xc5>;

		edp-1920x1200 {
			out-face = <0x0>;
			clock-frequency = <0x950f2e0>;
			hactive = <0x780>;
			vactive = <0x4b0>;
			hback-porch = <0x58>;
			hfront-porch = <0x30>;
			vback-porch = <0x1a>;
			vfront-porch = <0x3>;
			hsync-len = <0x2c>;
			vsync-len = <0x6>;
			hsync-active = <0x1>;
			vsync-active = <0x0>;
			de-active = <0x0>;
			pixelclk-active = <0x1>;
			swap-rb = <0x0>;
			swap-rg = <0x0>;
			swap-gb = <0x0>;
		};

		edp-1920x1080 {
			out-face = <0x0>;
			clock-frequency = <0x8d9ee20>;
			hactive = <0x780>;
			vactive = <0x438>;
			hback-porch = <0x94>;
			hfront-porch = <0x58>;
			vback-porch = <0x24>;
			vfront-porch = <0x4>;
			hsync-len = <0x2c>;
			vsync-len = <0x5>;
			hsync-active = <0x1>;
			vsync-active = <0x1>;
			de-active = <0x0>;
			pixelclk-active = <0x1>;
			swap-rb = <0x0>;
			swap-rg = <0x0>;
			swap-gb = <0x0>;
			phandle = <0xbb>;
		};

		edp-1024x768 {
			out-face = <0x0>;
			clock-frequency = <0x3dfd240>;
			hactive = <0x400>;
			vactive = <0x300>;
			hback-porch = <0xa0>;
			hfront-porch = <0x18>;
			vback-porch = <0x1d>;
			vfront-porch = <0x3>;
			hsync-len = <0x88>;
			vsync-len = <0x6>;
			hsync-active = <0x0>;
			vsync-active = <0x0>;
			de-active = <0x0>;
			pixelclk-active = <0x1>;
			swap-rb = <0x0>;
			swap-rg = <0x0>;
			swap-gb = <0x0>;
		};

		hdmi-720p {
			out-face = <0x0>;
			color-mode = <0x2>;
			clock-frequency = <0x46cf710>;
			hactive = <0x500>;
			vactive = <0x2d0>;
			hback-porch = <0xdc>;
			hfront-porch = <0x6e>;
			vback-porch = <0x14>;
			vfront-porch = <0x5>;
			hsync-len = <0x28>;
			vsync-len = <0x5>;
			hsync-active = <0x1>;
			vsync-active = <0x1>;
			de-active = <0x0>;
			pixelclk-active = <0x0>;
			swap-rb = <0x0>;
			swap-rg = <0x0>;
			swap-gb = <0x0>;
		};

		hdmi-1080p {
			out-face = <0x0>;
			color-mode = <0x2>;
			clock-frequency = <0x8d9ee20>;
			hactive = <0x780>;
			vactive = <0x438>;
			hback-porch = <0x94>;
			hfront-porch = <0x58>;
			vback-porch = <0x24>;
			vfront-porch = <0x4>;
			hsync-len = <0x2c>;
			vsync-len = <0x5>;
			hsync-active = <0x1>;
			vsync-active = <0x1>;
			de-active = <0x0>;
			pixelclk-active = <0x0>;
			swap-rb = <0x0>;
			swap-rg = <0x0>;
			swap-gb = <0x0>;
			phandle = <0xbc>;
		};

		hdmi-2160p {
			out-face = <0x0>;
			color-mode = <0x2>;
			clock-frequency = <0x11b3dc40>;
			hactive = <0xf00>;
			vactive = <0x870>;
			hback-porch = <0x128>;
			hfront-porch = <0xb0>;
			vback-porch = <0x48>;
			vfront-porch = <0x8>;
			hsync-len = <0x58>;
			vsync-len = <0xa>;
			hsync-active = <0x1>;
			vsync-active = <0x1>;
			de-active = <0x0>;
			pixelclk-active = <0x0>;
			swap-rb = <0x0>;
			swap-rg = <0x0>;
			swap-gb = <0x0>;
		};

		lvds-g070vw01 {
			rockchip,data-mapping = "vesa";
			rockchip,data-width = <0x18>;
			rockchip,output = "lvds";
			lvds-format = <0x0>;
			out-face = <0x0>;
			color-mode = <0x0>;
			clock-frequency = <0x1c52fa0>;
			hactive = <0x320>;
			vactive = <0x1e0>;
			hback-porch = <0x60>;
			hfront-porch = <0x18>;
			vback-porch = <0x3>;
			vfront-porch = <0xa>;
			hsync-len = <0x48>;
			vsync-len = <0x7>;
			hsync-active = <0x0>;
			vsync-active = <0x0>;
			de-active = <0x0>;
			pixelclk-active = <0x0>;
			swap-rb = <0x0>;
			swap-rg = <0x0>;
			swap-gb = <0x0>;
			cabc-lut = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x2 0x2 0x2 0x2 0x2 0x3 0x3 0x3 0x3 0x4 0x4 0x4 0x4 0x5 0x5 0x5 0x5 0x6 0x6 0x6 0x7 0x7 0x7 0x8 0x8 0x9 0x9 0x9 0xa 0xa 0xb 0xb 0xb 0xc 0xc 0xd 0xd 0xe 0xe 0xf 0xf 0x10 0x10 0x11 0x11 0x12 0x12 0x13 0x13 0x14 0x14 0x15 0x16 0x16 0x17 0x17 0x18 0x19 0x19 0x1a 0x1b 0x1b 0x1c 0x1d 0x1d 0x1e 0x1f 0x1f 0x20 0x21 0x21 0x22 0x23 0x24 0x24 0x25 0x26 0x27 0x28 0x28 0x29 0x2a 0x2b 0x2c 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x57 0x58 0x59 0x5a 0x5b 0x5d 0x5e 0x5f 0x60 0x61 0x63 0x64 0x65 0x66 0x68 0x69 0x6a 0x6c 0x6d 0x6e 0x70 0x71 0x72 0x74 0x75 0x76 0x78 0x79 0x7a 0x7c 0x7d 0x7f 0x80 0x81 0x83 0x84 0x86 0x87 0x89 0x8a 0x8c 0x8d 0x8f 0x90 0x92 0x93 0x95 0x96 0x98 0x99 0x9b 0x9c 0x9e 0xa0 0xa1 0xa3 0xa4 0xa6 0xa8 0xa9 0xab 0xac 0xae 0xb0 0xb1 0xb3 0xb5 0xb6 0xb8 0xba 0xbc 0xbd 0xbf 0xc1 0xc3 0xc4 0xc6 0xc8 0xca 0xcb 0xcd 0xcf 0xd1 0xd3 0xd4 0xd6 0xd8 0xda 0xdc 0xde 0xe0 0xe1 0xe3 0xe5 0xe7 0xe9 0xeb 0xed 0xef 0xf1 0xf3 0xf5 0xf7 0xf9 0xfb 0xfd 0xff>;
		};

		lvds-g150xgel05 {
			rockchip,data-mapping = "vesa";
			rockchip,data-width = <0x18>;
			rockchip,output = "lvds";
			lvds-format = <0x0>;
			out-face = <0x0>;
			color-mode = <0x0>;
			clock-frequency = <0x3dfd240>;
			hactive = <0x400>;
			vactive = <0x300>;
			hback-porch = <0xdc>;
			hfront-porch = <0x28>;
			vback-porch = <0x15>;
			vfront-porch = <0x7>;
			hsync-len = <0x3c>;
			vsync-len = <0xa>;
			hsync-active = <0x0>;
			vsync-active = <0x0>;
			de-active = <0x0>;
			pixelclk-active = <0x0>;
			swap-rb = <0x0>;
			swap-rg = <0x0>;
			swap-gb = <0x0>;
			cabc-lut = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x2 0x2 0x2 0x2 0x2 0x3 0x3 0x3 0x3 0x4 0x4 0x4 0x4 0x5 0x5 0x5 0x5 0x6 0x6 0x6 0x7 0x7 0x7 0x8 0x8 0x9 0x9 0x9 0xa 0xa 0xb 0xb 0xb 0xc 0xc 0xd 0xd 0xe 0xe 0xf 0xf 0x10 0x10 0x11 0x11 0x12 0x12 0x13 0x13 0x14 0x14 0x15 0x16 0x16 0x17 0x17 0x18 0x19 0x19 0x1a 0x1b 0x1b 0x1c 0x1d 0x1d 0x1e 0x1f 0x1f 0x20 0x21 0x21 0x22 0x23 0x24 0x24 0x25 0x26 0x27 0x28 0x28 0x29 0x2a 0x2b 0x2c 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x57 0x58 0x59 0x5a 0x5b 0x5d 0x5e 0x5f 0x60 0x61 0x63 0x64 0x65 0x66 0x68 0x69 0x6a 0x6c 0x6d 0x6e 0x70 0x71 0x72 0x74 0x75 0x76 0x78 0x79 0x7a 0x7c 0x7d 0x7f 0x80 0x81 0x83 0x84 0x86 0x87 0x89 0x8a 0x8c 0x8d 0x8f 0x90 0x92 0x93 0x95 0x96 0x98 0x99 0x9b 0x9c 0x9e 0xa0 0xa1 0xa3 0xa4 0xa6 0xa8 0xa9 0xab 0xac 0xae 0xb0 0xb1 0xb3 0xb5 0xb6 0xb8 0xba 0xbc 0xbd 0xbf 0xc1 0xc3 0xc4 0xc6 0xc8 0xca 0xcb 0xcd 0xcf 0xd1 0xd3 0xd4 0xd6 0xd8 0xda 0xdc 0xde 0xe0 0xe1 0xe3 0xe5 0xe7 0xe9 0xeb 0xed 0xef 0xf1 0xf3 0xf5 0xf7 0xf9 0xfb 0xfd 0xff>;
		};

		lvds-g215hvn01 {
			rockchip,data-mapping = "vesa";
			rockchip,data-width = <0x18>;
			rockchip,output = "duallvds";
			lvds-format = <0x0>;
			out-face = <0x0>;
			color-mode = <0x0>;
			clock-frequency = <0x8d9ee20>;
			hactive = <0x780>;
			vactive = <0x438>;
			hback-porch = <0xb4>;
			hfront-porch = <0x50>;
			vback-porch = <0x19>;
			vfront-porch = <0xf>;
			hsync-len = <0x14>;
			vsync-len = <0x5>;
			hsync-active = <0x0>;
			vsync-active = <0x0>;
			de-active = <0x0>;
			pixelclk-active = <0x0>;
			swap-rb = <0x0>;
			swap-rg = <0x0>;
			swap-gb = <0x0>;
			cabc-lut = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x2 0x2 0x2 0x2 0x2 0x3 0x3 0x3 0x3 0x4 0x4 0x4 0x4 0x5 0x5 0x5 0x5 0x6 0x6 0x6 0x7 0x7 0x7 0x8 0x8 0x9 0x9 0x9 0xa 0xa 0xb 0xb 0xb 0xc 0xc 0xd 0xd 0xe 0xe 0xf 0xf 0x10 0x10 0x11 0x11 0x12 0x12 0x13 0x13 0x14 0x14 0x15 0x16 0x16 0x17 0x17 0x18 0x19 0x19 0x1a 0x1b 0x1b 0x1c 0x1d 0x1d 0x1e 0x1f 0x1f 0x20 0x21 0x21 0x22 0x23 0x24 0x24 0x25 0x26 0x27 0x28 0x28 0x29 0x2a 0x2b 0x2c 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x57 0x58 0x59 0x5a 0x5b 0x5d 0x5e 0x5f 0x60 0x61 0x63 0x64 0x65 0x66 0x68 0x69 0x6a 0x6c 0x6d 0x6e 0x70 0x71 0x72 0x74 0x75 0x76 0x78 0x79 0x7a 0x7c 0x7d 0x7f 0x80 0x81 0x83 0x84 0x86 0x87 0x89 0x8a 0x8c 0x8d 0x8f 0x90 0x92 0x93 0x95 0x96 0x98 0x99 0x9b 0x9c 0x9e 0xa0 0xa1 0xa3 0xa4 0xa6 0xa8 0xa9 0xab 0xac 0xae 0xb0 0xb1 0xb3 0xb5 0xb6 0xb8 0xba 0xbc 0xbd 0xbf 0xc1 0xc3 0xc4 0xc6 0xc8 0xca 0xcb 0xcd 0xcf 0xd1 0xd3 0xd4 0xd6 0xd8 0xda 0xdc 0xde 0xe0 0xe1 0xe3 0xe5 0xe7 0xe9 0xeb 0xed 0xef 0xf1 0xf3 0xf5 0xf7 0xf9 0xfb 0xfd 0xff>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		autorepeat;
		pinctrl-names = "default";
		pinctrl-0 = <0xbd>;

		button@0 {
			gpios = <0x35 0x5 0x1>;
			linux,code = <0x74>;
			label = "GPIO Key Power";
			linux,input-type = <0x1>;
			gpio-key,wakeup = <0x1>;
			debounce-interval = <0x64>;
		};
	};

	sdio-pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <0xbe 0x1>;
		clock-names = "ext_clock";
		pinctrl-names = "default";
		pinctrl-0 = <0xbf>;
		reset-gpios = <0x4e 0x12 0x1>;
		phandle = <0x1c>;
	};

	wireless-wlan {
		compatible = "wlan-platdata";
		rockchip,grf = <0x53>;
		wifi_chip_type = "rtl8723bs";
		sdio_vref = <0xce4>;
		keep_wifi_power_on = <0x1>;
		pinctrl-names = "default";
		pinctrl-0 = <0xc0>;
		WIFI,host_wake_irq = <0x55 0x1a 0x0>;
		WIFI,poweren_gpio = <0x55 0x1c 0x0>;
		status = "okay";
	};

	wireless-bluetooth {
		compatible = "bluetooth-platdata";
		uart_rts_gpios = <0x55 0x13 0x1>;
		pinctrl-names = "default", "rts_gpio";
		pinctrl-0 = <0xc1 0xc2>;
		pinctrl-1 = <0xc3 0xc2>;
		BT,power_gpio = <0x4e 0x11 0x0>;
		status = "okay";
	};

	vdd-lvds-regulator {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <0xb1 0x1a 0x0>;
		pinctrl-names = "default";
		pinctrl-0 = <0xc4>;
		regulator-name = "vdd_lvds";
		phandle = <0xc7>;
	};

	edp_panel {
		compatible = "simple-panel";
		status = "disabled";
		panel_type = <0x9>;
		display-timings = <0xc5>;

		ports {

			endpoint {
				remote-endpoint = <0xc6>;
				phandle = <0x98>;
			};
		};
	};

	lvds_panel {
		status = "disabled";
		compatible = "simple-panel";
		power-supply = <0xc7>;
		backlight = <0xc8>;
		panel_type = <0x2>;
		bpc = <0x8>;
		bus-format = <0x100a>;
		prepare-delay-ms = <0x78>;
		enable-delay-ms = <0x78>;
		unprepare-delay-ms = <0x78>;
		disable-delay-ms = <0x78>;
		rockchip,data-mapping = "vesa";
		rockchip,data-width = <0x18>;
		rockchip,output = "lvds";
		display-timings = <0xc5>;

		ports {

			endpoint {
				remote-endpoint = <0xc9>;
				phandle = <0x9a>;
			};
		};
	};

	xin32k {
		compatible = "fixed-clock";
		clock-frequency = <0x8000>;
		clock-output-names = "xin32k";
		#clock-cells = <0x0>;
	};

	external-gmac-clock {
		compatible = "fixed-clock";
		clock-frequency = <0x7735940>;
		clock-output-names = "ext_gmac";
		#clock-cells = <0x0>;
		phandle = <0x56>;
	};

	vsys-regulator {
		compatible = "regulator-fixed";
		regulator-name = "vcc_sys";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x38>;
	};

	vdd-logic {
		compatible = "regulator-fixed";
		regulator-name = "vcc_log";
		regulator-min-microvolt = <0x118c30>;
		regulator-max-microvolt = <0x118c30>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0xaf>;
	};

	vdd-logic-regulator {
		compatible = "regulator-fixed";
		regulator-name = "vcc_flash";
		regulator-min-microvolt = <0x1b7740>;
		regulator-max-microvolt = <0x1b7740>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x79>;
	};

	vcc-phy-regulator {
		compatible = "regulator-fixed";
		regulator-name = "vcc_phy";
		regulator-min-microvolt = <0x1b7740>;
		regulator-max-microvolt = <0x1b7740>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
		gpio = <0x55 0x2 0x0>;
		pinctrl-names = "default";
		pinctrl-0 = <0xca>;
		phandle = <0x54>;
	};

	misc-adv-gpio {
		compatible = "misc-adv-gpio";
		minipcie-pwr-gpio = <0xcb 0x6 0x0>;
		timing-interval = <0xa>;
		minipcie-reset-gpio = <0xcc 0x7 0x1>;
		system-reset-gpio = <0x35 0xa 0x1>;
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = <0xcd 0xce>;
	};
};
